arm/mm/cache-v4wb.S

1 /* SPDX-License-Identifier: GPL-2.0-only */
3  *  linux/arch/arm/mm/cache-v4wb.S
5  *  Copyright (C) 1997-2002 Russell king
11 #include "proc-macros.S"
38  *  32768  150 149 150   214 216 212 <---
40  * 131072  591 591 591   656 657 651
41  *  Whole  132 136 132   221 217 207 <---
43 #define CACHE_DLIMIT	(CACHE_DSIZE * 4)
88 	add	r2, r2, #FLUSH_BASE_MINICACHE - FLUSH_BASE
94 	mcr	p15, 0, ip, c7, c10, 4		@ drain write buffer
103  *	- start - start address (inclusive, page aligned)
104  *	- end	- end address (exclusive, page aligned)
105  *	- flags	- vma_area_struct flags describing address space
122 	mcrne	p15, 0, ip, c7, c10, 4		@ drain write buffer
131  *	- addr	- kernel address
132  *	- size	- region size
142  *	region described by start.  If you have non-snooping
145  *	- start  - virtual start address
146  *	- end	 - virtual end address
155  *	region described by start.  If you have non-snooping
158  *	- start  - virtual start address
159  *	- end	 - virtual end address
162 	bic	r0, r0, #CACHE_DLINESIZE - 1
170 	mcr	p15, 0, r0, c7, c10, 4		@ drain WB
182  *	- start  - virtual start address
183  *	- end	 - virtual end address
186 	tst	r0, #CACHE_DLINESIZE - 1
187 	bic	r0, r0, #CACHE_DLINESIZE - 1
189 	tst	r1, #CACHE_DLINESIZE - 1
195 	mcr	p15, 0, r0, c7, c10, 4		@ drain write buffer
203  *	- start  - virtual start address
204  *	- end	 - virtual end address
207 	bic	r0, r0, #CACHE_DLINESIZE - 1
212 	mcr	p15, 0, r0, c7, c10, 4		@ drain write buffer
220  *	- start  - virtual start address
221  *	- end	 - virtual end address
230  *	- start	- kernel virtual start address
231  *	- size	- size of region
232  *	- dir	- DMA direction
244  *	- start	- kernel virtual start address
245  *	- size	- size of region
246  *	- dir	- DMA direction
257 	@ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S)