arm/mach-zynq/slcr.c

1 // SPDX-License-Identifier: GPL-2.0-or-later
5  * Copyright (c) 2011-2013 Xilinx Inc.
13 #include <linux/clk/zynq.h>
34  * zynq_slcr_write - Write to a register in SLCR block
47  * zynq_slcr_read - Read a register in SLCR block
60  * zynq_slcr_unlock - Unlock SLCR registers
72  * zynq_slcr_get_device_id - Read device code id
88  * zynq_slcr_system_restart - Restart the entire system.
104 	 * the FSBL not loading the bitstream after soft-reboot  in zynq_slcr_system_restart()
109 	zynq_slcr_write(1, SLCR_PS_RST_CTRL_OFFSET);  in zynq_slcr_system_restart()
119  * zynq_slcr_cpu_start - Start cpu
136  * zynq_slcr_cpu_stop - Stop cpu
149  * zynq_slcr_cpu_state - Read/write cpu state
153  * 0 means cpu is running, 1 cpu is going to die.
162 	state &= 1 << (31 - cpu);  in zynq_slcr_cpu_state_read()
168  * zynq_slcr_cpu_state - Read/write cpu state
170  * @die:	cpu state - true if cpu is going to die
173  * 0 means cpu is running, 1 cpu is going to die.
180 	mask = 1 << (31 - cpu);  in zynq_slcr_cpu_state_write()
189  * zynq_early_slcr_init - Early slcr init function
199 	np = of_find_compatible_node(NULL, NULL, "xlnx,zynq-slcr");  in zynq_early_slcr_init()
211 	np->data = (__force void *)zynq_slcr_base;  in zynq_early_slcr_init()
213 	zynq_slcr_regmap = syscon_regmap_lookup_by_compatible("xlnx,zynq-slcr");  in zynq_early_slcr_init()
215 		pr_err("%s: failed to find zynq-slcr\n", __func__);  in zynq_early_slcr_init()
217 		return -ENODEV;  in zynq_early_slcr_init()
220 	/* unlock the SLCR so that registers can be changed */  in zynq_early_slcr_init()