Lines Matching +full:cortex +full:- +full:r5

1 /* SPDX-License-Identifier: GPL-2.0-only */
13 #include <asm/asm-offsets.h>
22 .arch armv7-a
30  *	  re-enabling sdram.
74 	/* L2 cache resume & re-enable */
106 	 * r0=3 for the wake-up notification.
135  *       must be position-independent.
147 	ldr	r5, [r12, #RESET_DATA(TF_PRESENT)]
148 	cmp	r5, #0
156 	# Tegra20 is a Cortex-A9 r1p1
172 	# Tegra30 is a Cortex-A9 r2p9
262 	addne	r2, r1, #(FLOW_CTRL_CPU1_CSR-8)
263 	addne	r1, r1, #(FLOW_CTRL_HALT_CPU1_EVENTS-8)
296 					. - __tegra_cpu_reset_handler_start