Lines Matching +full:0 +full:xe6180000

19 #define CPG_BASE2	0xe6151000
20 #define WUPCR		0x10	/* System-CPU Wake Up Control Register */
21 #define SRESCR		0x18	/* System-CPU Software Reset Control Register */
22 #define PSTR		0x40	/* System-CPU Power Status Register */
24 #define SYSC_BASE	0xe6180000
25 #define SBAR		0x20	/* SYS Boot Address Register */
27 #define AP_BASE		0xe6f10000
28 #define APARMBAREA	0x20	/* Address Translation Area Register */
30 #define SH73A0_SCU_BASE 0xf0000000
42 	return 0;  in sh73a0_boot_secondary()
51 	writel(0, ap + APARMBAREA);      /* 4k */  in sh73a0_smp_prepare_cpus()