84 	u32 reg_val;  in cortex_a7_release_secondary()  local
103 	reg_val = CORE_RST | COREPOR_RST | CLAMP | CORE_MEM_CLAMP;  in cortex_a7_release_secondary()
104 	writel(reg_val, reg + APCS_CPU_PWR_CTL);  in cortex_a7_release_secondary()
111 	reg_val &= ~CORE_MEM_CLAMP;  in cortex_a7_release_secondary()
112 	writel(reg_val, reg + APCS_CPU_PWR_CTL);  in cortex_a7_release_secondary()
113 	reg_val |= L2DT_SLP;  in cortex_a7_release_secondary()
114 	writel(reg_val, reg + APCS_CPU_PWR_CTL);  in cortex_a7_release_secondary()
117 	reg_val = (reg_val | BIT(17)) & ~CLAMP;  in cortex_a7_release_secondary()
118 	writel(reg_val, reg + APCS_CPU_PWR_CTL);  in cortex_a7_release_secondary()
122 	reg_val &= ~(CORE_RST | COREPOR_RST);  in cortex_a7_release_secondary()
123 	writel(reg_val, reg + APCS_CPU_PWR_CTL);  in cortex_a7_release_secondary()
124 	reg_val |= CORE_PWRD_UP;  in cortex_a7_release_secondary()
125 	writel(reg_val, reg + APCS_CPU_PWR_CTL);  in cortex_a7_release_secondary()
219 	unsigned reg_val;  in kpssv2_release_secondary()  local
257 	reg_val = (64 << BHS_CNT_SHIFT) | (0x3f << LDO_PWR_DWN_SHIFT) | BHS_EN;  in kpssv2_release_secondary()
258 	writel_relaxed(reg_val, reg + APC_PWR_GATE_CTL);  in kpssv2_release_secondary()
264 	reg_val |= 0x3f << BHS_SEG_SHIFT;  in kpssv2_release_secondary()
265 	writel_relaxed(reg_val, reg + APC_PWR_GATE_CTL);  in kpssv2_release_secondary()
271 	reg_val |= 0x3f << LDO_BYP_SHIFT;  in kpssv2_release_secondary()
272 	writel_relaxed(reg_val, reg + APC_PWR_GATE_CTL);  in kpssv2_release_secondary()
279 	reg_val = COREPOR_RST | CLAMP;  in kpssv2_release_secondary()
280 	writel_relaxed(reg_val, reg + APCS_CPU_PWR_CTL);  in kpssv2_release_secondary()
284 	reg_val &= ~CLAMP;  in kpssv2_release_secondary()
285 	writel_relaxed(reg_val, reg + APCS_CPU_PWR_CTL);  in kpssv2_release_secondary()
289 	reg_val &= ~COREPOR_RST;  in kpssv2_release_secondary()
290 	writel_relaxed(reg_val, reg + APCS_CPU_PWR_CTL);  in kpssv2_release_secondary()
293 	reg_val |= CORE_PWRD_UP;  in kpssv2_release_secondary()
294 	writel_relaxed(reg_val, reg + APCS_CPU_PWR_CTL);  in kpssv2_release_secondary()