Lines Matching refs:soc_pm
150 static struct at91_soc_pm soc_pm = { variable
167 __raw_readl(soc_pm.data.ramc[id] + field)
170 __raw_writel(value, soc_pm.data.ramc[id] + field)
247 if (!soc_pm.data.pmc || !soc_pm.data.shdwc || !soc_pm.ws_ids) in at91_pm_config_ws()
251 writel(mode, soc_pm.data.pmc + AT91_PMC_FSMR); in at91_pm_config_ws()
255 if (soc_pm.config_shdwc_ws) in at91_pm_config_ws()
256 soc_pm.config_shdwc_ws(soc_pm.data.shdwc, &mode, &polarity); in at91_pm_config_ws()
259 val = readl(soc_pm.data.shdwc + 0x04); in at91_pm_config_ws()
262 for_each_matching_node_and_match(np, soc_pm.ws_ids, &match) { in at91_pm_config_ws()
284 if (soc_pm.config_pmc_ws) in at91_pm_config_ws()
285 soc_pm.config_pmc_ws(soc_pm.data.pmc, mode, polarity); in at91_pm_config_ws()
330 if (!(eth->modes & BIT(soc_pm.data.mode))) in at91_pm_eth_quirk_is_valid()
365 eth = &soc_pm.quirks.eth[i]; in at91_pm_config_quirks()
376 if (suspend && eth->dns_modes & BIT(soc_pm.data.mode)) { in at91_pm_config_quirks()
431 eth = &soc_pm.quirks.eth[j]; in at91_pm_config_quirks()
463 soc_pm.data.mode = soc_pm.data.suspend_mode; in at91_pm_begin()
467 soc_pm.data.mode = soc_pm.data.standby_mode; in at91_pm_begin()
471 soc_pm.data.mode = -1; in at91_pm_begin()
474 ret = at91_pm_config_ws(soc_pm.data.mode, true); in at91_pm_begin()
478 if (soc_pm.data.mode == AT91_PM_BACKUP) in at91_pm_begin()
479 soc_pm.bu->suspended = 1; in at91_pm_begin()
480 else if (soc_pm.bu) in at91_pm_begin()
481 soc_pm.bu->suspended = 0; in at91_pm_begin()
495 scsr = readl(soc_pm.data.pmc + AT91_PMC_SCSR); in at91_pm_verify_clocks()
498 if ((scsr & soc_pm.data.uhp_udp_mask) != 0) { in at91_pm_verify_clocks()
509 css = readl(soc_pm.data.pmc + AT91_PMC_PCKR(i)) & AT91_PMC_CSS; in at91_pm_verify_clocks()
531 return (soc_pm.data.mode >= AT91_PM_ULP0); in at91_suspend_entering_slow_clock()
550 if (soc_pm.data.mode == AT91_PM_BACKUP && soc_pm.data.ramc_phy) { in at91_suspend_finish()
558 tmp = readl(soc_pm.data.ramc_phy + DDR3PHY_ZQ0SR0); in at91_suspend_finish()
562 soc_pm.bu->ddr_phy_calibration[0] = modified_gray_code[index]; in at91_suspend_finish()
566 soc_pm.bu->ddr_phy_calibration[0] |= modified_gray_code[index]; in at91_suspend_finish()
570 soc_pm.bu->ddr_phy_calibration[0] |= modified_gray_code[index]; in at91_suspend_finish()
574 soc_pm.bu->ddr_phy_calibration[0] |= modified_gray_code[index]; in at91_suspend_finish()
582 soc_pm.bu->ddr_phy_calibration[i] = in at91_suspend_finish()
583 *((unsigned int *)soc_pm.memcs + (i - 1)); in at91_suspend_finish()
589 at91_suspend_sram_fn(&soc_pm.data); in at91_suspend_finish()
600 if (!soc_pm.data.sfrbu) in at91_pm_switch_ba_to_vbat()
603 val = readl(soc_pm.data.sfrbu + offset); in at91_pm_switch_ba_to_vbat()
606 if (!(val & soc_pm.sfrbu_regs.pswbu.state)) in at91_pm_switch_ba_to_vbat()
609 val &= ~soc_pm.sfrbu_regs.pswbu.softsw; in at91_pm_switch_ba_to_vbat()
610 val |= soc_pm.sfrbu_regs.pswbu.key | soc_pm.sfrbu_regs.pswbu.ctrl; in at91_pm_switch_ba_to_vbat()
611 writel(val, soc_pm.data.sfrbu + offset); in at91_pm_switch_ba_to_vbat()
614 val = readl(soc_pm.data.sfrbu + offset); in at91_pm_switch_ba_to_vbat()
615 while (val & soc_pm.sfrbu_regs.pswbu.state) in at91_pm_switch_ba_to_vbat()
616 val = readl(soc_pm.data.sfrbu + offset); in at91_pm_switch_ba_to_vbat()
621 if (soc_pm.data.mode == AT91_PM_BACKUP) { in at91_pm_suspend()
662 if (soc_pm.data.mode >= AT91_PM_ULP0 && in at91_pm_enter()
689 at91_pm_config_ws(soc_pm.data.mode, false); in at91_pm_end()
722 : "r" (0), "r" (soc_pm.data.ramc[0]), in at91rm9200_standby()
745 if (soc_pm.data.ramc[1]) { in at91_ddr_standby()
763 if (soc_pm.data.ramc[1]) in at91_ddr_standby()
770 if (soc_pm.data.ramc[1]) { in at91_ddr_standby()
800 if (soc_pm.data.ramc[1]) { in at91sam9_sdram_standby()
812 if (soc_pm.data.ramc[1]) in at91sam9_sdram_standby()
818 if (soc_pm.data.ramc[1]) in at91sam9_sdram_standby()
826 pwrtmg = readl(soc_pm.data.ramc[0] + UDDRC_PWRCTL); in sama7g5_standby()
827 ratio = readl(soc_pm.data.pmc + AT91_PMC_RATIO); in sama7g5_standby()
835 soc_pm.data.ramc[0] + UDDRC_PWRCTL); in sama7g5_standby()
837 writel(ratio & ~AT91_PMC_RATIO_RATIO, soc_pm.data.pmc + AT91_PMC_RATIO); in sama7g5_standby()
842 writel(ratio, soc_pm.data.pmc + AT91_PMC_RATIO); in sama7g5_standby()
843 writel(pwrtmg, soc_pm.data.ramc[0] + UDDRC_PWRCTL); in sama7g5_standby()
883 soc_pm.data.ramc[idx] = of_iomap(np, 0); in at91_dt_ramc()
884 if (!soc_pm.data.ramc[idx]) { in at91_dt_ramc()
895 soc_pm.data.memctrl = ramc->memctrl; in at91_dt_ramc()
909 soc_pm.data.ramc_phy = of_iomap(np, 0); in at91_dt_ramc()
910 if (!soc_pm.data.ramc_phy) { in at91_dt_ramc()
918 if (phy_mandatory && !soc_pm.data.ramc_phy) { in at91_dt_ramc()
935 iounmap(soc_pm.data.ramc[--idx]); in at91_dt_ramc()
946 writel(AT91_PMC_PCK, soc_pm.data.pmc + AT91_PMC_SCDR); in at91rm9200_idle()
951 writel(AT91_PMC_PCK, soc_pm.data.pmc + AT91_PMC_SCDR); in at91sam9_idle()
1008 return (soc_pm.data.standby_mode == pm_mode || in at91_is_pm_mode_active()
1009 soc_pm.data.suspend_mode == pm_mode); in at91_is_pm_mode_active()
1033 soc_pm.memcs = __va((phys_addr_t)be32_to_cpu(*reg)); in at91_pm_backup_scan_memcs()
1071 soc_pm.bu = (void *)gen_pool_alloc(sram_pool, sizeof(struct at91_pm_bu)); in at91_pm_backup_init()
1072 if (!soc_pm.bu) { in at91_pm_backup_init()
1078 soc_pm.bu->suspended = 0; in at91_pm_backup_init()
1079 soc_pm.bu->canary = __pa_symbol(&canary); in at91_pm_backup_init()
1080 soc_pm.bu->resume = __pa_symbol(cpu_resume); in at91_pm_backup_init()
1081 if (soc_pm.data.ramc_phy) { in at91_pm_backup_init()
1099 suspend_mode = soc_pm.data.suspend_mode; in at91_pm_secure_init()
1121 soc_pm.data.suspend_mode = res.a1; in at91_pm_secure_init()
1190 (soc_pm.data.standby_mode), \
1191 (soc_pm.data.suspend_mode)); \
1193 (soc_pm.data.suspend_mode), \
1194 (soc_pm.data.standby_mode)); \
1219 struct at91_pm_quirk_eth *gmac = &soc_pm.quirks.eth[AT91_PM_G_ETH]; in at91_pm_modes_init()
1220 struct at91_pm_quirk_eth *emac = &soc_pm.quirks.eth[AT91_PM_E_ETH]; in at91_pm_modes_init()
1226 if (soc_pm.data.standby_mode == AT91_PM_BACKUP) in at91_pm_modes_init()
1227 soc_pm.data.standby_mode = AT91_PM_ULP0; in at91_pm_modes_init()
1228 if (soc_pm.data.suspend_mode == AT91_PM_BACKUP) in at91_pm_modes_init()
1229 soc_pm.data.suspend_mode = AT91_PM_ULP0; in at91_pm_modes_init()
1232 if (maps[soc_pm.data.standby_mode] & AT91_PM_IOMAP(SHDWC) || in at91_pm_modes_init()
1233 maps[soc_pm.data.suspend_mode] & AT91_PM_IOMAP(SHDWC)) { in at91_pm_modes_init()
1239 soc_pm.data.shdwc = of_iomap(np, 0); in at91_pm_modes_init()
1244 if (maps[soc_pm.data.standby_mode] & AT91_PM_IOMAP(SFRBU) || in at91_pm_modes_init()
1245 maps[soc_pm.data.suspend_mode] & AT91_PM_IOMAP(SFRBU)) { in at91_pm_modes_init()
1251 soc_pm.data.sfrbu = of_iomap(np, 0); in at91_pm_modes_init()
1259 (maps[soc_pm.data.standby_mode] & AT91_PM_IOMAP(ETHC) || in at91_pm_modes_init()
1260 maps[soc_pm.data.suspend_mode] & AT91_PM_IOMAP(ETHC))) { in at91_pm_modes_init()
1292 if (soc_pm.data.shdwc && in at91_pm_modes_init()
1293 !(maps[soc_pm.data.standby_mode] & AT91_PM_IOMAP(SHDWC) || in at91_pm_modes_init()
1294 maps[soc_pm.data.suspend_mode] & AT91_PM_IOMAP(SHDWC))) { in at91_pm_modes_init()
1295 iounmap(soc_pm.data.shdwc); in at91_pm_modes_init()
1296 soc_pm.data.shdwc = NULL; in at91_pm_modes_init()
1299 if (soc_pm.data.sfrbu && in at91_pm_modes_init()
1300 !(maps[soc_pm.data.standby_mode] & AT91_PM_IOMAP(SFRBU) || in at91_pm_modes_init()
1301 maps[soc_pm.data.suspend_mode] & AT91_PM_IOMAP(SFRBU))) { in at91_pm_modes_init()
1302 iounmap(soc_pm.data.sfrbu); in at91_pm_modes_init()
1303 soc_pm.data.sfrbu = NULL; in at91_pm_modes_init()
1374 if (modes[i] == soc_pm.data.standby_mode && !standby) { in at91_pm_modes_validate()
1379 if (modes[i] == soc_pm.data.suspend_mode && !suspend) { in at91_pm_modes_validate()
1386 if (soc_pm.data.suspend_mode == AT91_PM_STANDBY) in at91_pm_modes_validate()
1392 pm_modes[soc_pm.data.standby_mode].pattern, in at91_pm_modes_validate()
1394 soc_pm.data.standby_mode = mode; in at91_pm_modes_validate()
1398 if (soc_pm.data.standby_mode == AT91_PM_ULP0) in at91_pm_modes_validate()
1404 pm_modes[soc_pm.data.suspend_mode].pattern, in at91_pm_modes_validate()
1406 soc_pm.data.suspend_mode = mode; in at91_pm_modes_validate()
1420 soc_pm.data.pmc = of_iomap(pmc_np, 0); in at91_pm_init()
1422 if (!soc_pm.data.pmc) { in at91_pm_init()
1428 soc_pm.data.uhp_udp_mask = pmc->uhp_udp_mask; in at91_pm_init()
1429 soc_pm.data.pmc_mckr_offset = pmc->mckr; in at91_pm_init()
1430 soc_pm.data.pmc_version = pmc->version; in at91_pm_init()
1440 pm_modes[soc_pm.data.standby_mode].pattern, in at91_pm_init()
1441 pm_modes[soc_pm.data.suspend_mode].pattern); in at91_pm_init()
1459 soc_pm.data.standby_mode = AT91_PM_STANDBY; in at91rm9200_pm_init()
1460 soc_pm.data.suspend_mode = AT91_PM_ULP0; in at91rm9200_pm_init()
1495 soc_pm.ws_ids = sam9x60_ws_ids; in sam9x60_pm_init()
1496 soc_pm.config_pmc_ws = at91_sam9x60_config_pmc_ws; in sam9x60_pm_init()
1511 soc_pm.data.standby_mode = AT91_PM_STANDBY; in at91sam9_pm_init()
1512 soc_pm.data.suspend_mode = AT91_PM_ULP0; in at91sam9_pm_init()
1544 soc_pm.quirks.eth[AT91_PM_G_ETH].modes = BIT(AT91_PM_ULP0) | in sama5_pm_init()
1548 soc_pm.quirks.eth[AT91_PM_G_ETH].dns_modes = BIT(AT91_PM_ULP0) | in sama5_pm_init()
1585 soc_pm.ws_ids = sama5d2_ws_ids; in sama5d2_pm_init()
1586 soc_pm.config_shdwc_ws = at91_sama5d2_config_shdwc_ws; in sama5d2_pm_init()
1587 soc_pm.config_pmc_ws = at91_sama5d2_config_pmc_ws; in sama5d2_pm_init()
1589 soc_pm.sfrbu_regs.pswbu.key = (0x4BD20C << 8); in sama5d2_pm_init()
1590 soc_pm.sfrbu_regs.pswbu.ctrl = BIT(0); in sama5d2_pm_init()
1591 soc_pm.sfrbu_regs.pswbu.softsw = BIT(1); in sama5d2_pm_init()
1592 soc_pm.sfrbu_regs.pswbu.state = BIT(3); in sama5d2_pm_init()
1595 soc_pm.quirks.eth[AT91_PM_G_ETH].modes = BIT(AT91_PM_ULP0) | in sama5d2_pm_init()
1602 soc_pm.quirks.eth[AT91_PM_G_ETH].dns_modes = BIT(AT91_PM_ULP0) | in sama5d2_pm_init()
1633 soc_pm.ws_ids = sama7g5_ws_ids; in sama7_pm_init()
1634 soc_pm.config_pmc_ws = at91_sam9x60_config_pmc_ws; in sama7_pm_init()
1636 soc_pm.sfrbu_regs.pswbu.key = (0x4BD20C << 8); in sama7_pm_init()
1637 soc_pm.sfrbu_regs.pswbu.ctrl = BIT(0); in sama7_pm_init()
1638 soc_pm.sfrbu_regs.pswbu.softsw = BIT(1); in sama7_pm_init()
1639 soc_pm.sfrbu_regs.pswbu.state = BIT(2); in sama7_pm_init()
1642 soc_pm.quirks.eth[AT91_PM_E_ETH].modes = BIT(AT91_PM_ULP1); in sama7_pm_init()
1643 soc_pm.quirks.eth[AT91_PM_G_ETH].modes = BIT(AT91_PM_ULP1); in sama7_pm_init()
1664 soc_pm.data.standby_mode = standby; in at91_pm_modes_select()
1665 soc_pm.data.suspend_mode = suspend; in at91_pm_modes_select()