1 // SPDX-License-Identifier: GPL-2.0-or-later
3  * arch/arm/mach-at91/pm.c
35  * struct at91_pm_bu - AT91 power management backup unit data structure
52  * struct at91_pm_sfrbu_regs - registers mapping for SFRBU
65  * enum at91_pm_eth_clk - Ethernet clock indexes
77  * enum at91_pm_eth - Ethernet controller indexes
89  * struct at91_pm_quirk_eth - AT91 PM Ethernet quirks
107  * struct at91_pm_quirks - AT91 PM quirks
115  * struct at91_soc_pm - AT91 SoC power management data structure
117  * @config_pmc_ws: wakeup srouces configuration function for PMC
127 	int (*config_pmc_ws)(void __iomem *pmc, u32 mode, u32 polarity);
137  * enum at91_pm_iomaps - IOs that needs to be mapped for different PM modes
160 	{ AT91_PM_ULP0_FAST,    "ulp0-fast" },
163 	{ -1, NULL },
203 	{ .compatible = "atmel,sama5d2-gem",		.data = &ws_info[0] },
204 	{ .compatible = "atmel,sama5d2-rtc",		.data = &ws_info[1] },
205 	{ .compatible = "atmel,sama5d3-udc",		.data = &ws_info[2] },
206 	{ .compatible = "atmel,at91rm9200-ohci",	.data = &ws_info[2] },
207 	{ .compatible = "usb-ohci",			.data = &ws_info[2] },
208 	{ .compatible = "atmel,at91sam9g45-ehci",	.data = &ws_info[2] },
209 	{ .compatible = "usb-ehci",			.data = &ws_info[2] },
210 	{ .compatible = "atmel,sama5d2-sdhci",		.data = &ws_info[3] },
215 	{ .compatible = "microchip,sam9x60-rtc",	.data = &ws_info[1] },
216 	{ .compatible = "atmel,at91rm9200-ohci",	.data = &ws_info[2] },
217 	{ .compatible = "usb-ohci",			.data = &ws_info[2] },
218 	{ .compatible = "atmel,at91sam9g45-ehci",	.data = &ws_info[2] },
219 	{ .compatible = "usb-ehci",			.data = &ws_info[2] },
220 	{ .compatible = "microchip,sam9x60-rtt",	.data = &ws_info[4] },
221 	{ .compatible = "cdns,sam9x60-macb",		.data = &ws_info[5] },
226 	{ .compatible = "microchip,sama7g5-rtc",	.data = &ws_info[1] },
227 	{ .compatible = "microchip,sama7g5-ohci",	.data = &ws_info[2] },
228 	{ .compatible = "usb-ohci",			.data = &ws_info[2] },
229 	{ .compatible = "atmel,at91sam9g45-ehci",	.data = &ws_info[2] },
230 	{ .compatible = "usb-ehci",			.data = &ws_info[2] },
231 	{ .compatible = "microchip,sama7g5-sdhci",	.data = &ws_info[3] },
232 	{ .compatible = "microchip,sama7g5-rtt",	.data = &ws_info[4] },
247 	if (!soc_pm.data.pmc || !soc_pm.data.shdwc || !soc_pm.ws_ids)  in at91_pm_config_ws()
248 		return -EPERM;  in at91_pm_config_ws()
251 		writel(mode, soc_pm.data.pmc + AT91_PMC_FSMR);  in at91_pm_config_ws()
267 		if (device_may_wakeup(&pdev->dev)) {  in at91_pm_config_ws()
268 			wsi = match->data;  in at91_pm_config_ws()
271 			if (wsi->shdwc_mr_bit && !(val & wsi->shdwc_mr_bit))  in at91_pm_config_ws()
274 			mode |= wsi->pmc_fsmr_bit;  in at91_pm_config_ws()
275 			if (wsi->set_polarity)  in at91_pm_config_ws()
276 				polarity |= wsi->pmc_fsmr_bit;  in at91_pm_config_ws()
280 		put_device(&pdev->dev);  in at91_pm_config_ws()
285 			soc_pm.config_pmc_ws(soc_pm.data.pmc, mode, polarity);  in at91_pm_config_ws()
290 	return mode ? 0 : -EPERM;  in at91_pm_config_ws()
306 static int at91_sama5d2_config_pmc_ws(void __iomem *pmc, u32 mode, u32 polarity)  in at91_sama5d2_config_pmc_ws()  argument
308 	writel(mode, pmc + AT91_PMC_FSMR);  in at91_sama5d2_config_pmc_ws()
309 	writel(polarity, pmc + AT91_PMC_FSPR);  in at91_sama5d2_config_pmc_ws()
314 static int at91_sam9x60_config_pmc_ws(void __iomem *pmc, u32 mode, u32 polarity)  in at91_sam9x60_config_pmc_ws()  argument
316 	writel(mode, pmc + AT91_PMC_FSMR);  in at91_sam9x60_config_pmc_ws()
326 	if (!eth->np)  in at91_pm_eth_quirk_is_valid()
330 	if (!(eth->modes & BIT(soc_pm.data.mode)))  in at91_pm_eth_quirk_is_valid()
333 	if (!eth->dev) {  in at91_pm_eth_quirk_is_valid()
335 		pdev = of_find_device_by_node(eth->np);  in at91_pm_eth_quirk_is_valid()
338 		/* put_device(eth->dev) is called at the end of suspend. */  in at91_pm_eth_quirk_is_valid()
339 		eth->dev = &pdev->dev;  in at91_pm_eth_quirk_is_valid()
343 	if (!device_may_wakeup(eth->dev))  in at91_pm_eth_quirk_is_valid()
376 		if (suspend && eth->dns_modes & BIT(soc_pm.data.mode)) {  in at91_pm_config_quirks()
382 				if (ws->dev == eth->dev)  in at91_pm_config_quirks()
397 				ret = -EPERM;  in at91_pm_config_quirks()
398 				put_device(eth->dev);  in at91_pm_config_quirks()
399 				eth->dev = NULL;  in at91_pm_config_quirks()
401 				i--;  in at91_pm_config_quirks()
407 			clk_bulk_disable_unprepare(AT91_PM_ETH_MAX_CLK, eth->clks);  in at91_pm_config_quirks()
410 						      eth->clks);  in at91_pm_config_quirks()
414 			 * Release the reference to eth->dev taken in  in at91_pm_config_quirks()
417 			put_device(eth->dev);  in at91_pm_config_quirks()
418 			eth->dev = NULL;  in at91_pm_config_quirks()
430 	for (j = i; j >= 0; j--) {  in at91_pm_config_quirks()
436 			tmp = clk_bulk_prepare_enable(AT91_PM_ETH_MAX_CLK, eth->clks);  in at91_pm_config_quirks()
444 		 * Release the reference to eth->dev taken in  in at91_pm_config_quirks()
447 		put_device(eth->dev);  in at91_pm_config_quirks()
448 		eth->dev = NULL;  in at91_pm_config_quirks()
471 		soc_pm.data.mode = -1;  in at91_pm_begin()
479 		soc_pm.bu->suspended = 1;  in at91_pm_begin()
481 		soc_pm.bu->suspended = 0;  in at91_pm_begin()
488  * slow-clock mode.
495 	scsr = readl(soc_pm.data.pmc + AT91_PMC_SCSR);  in at91_pm_verify_clocks()
499 		pr_err("AT91: PM - Suspend-to-RAM with USB still active\n");  in at91_pm_verify_clocks()
509 		css = readl(soc_pm.data.pmc + AT91_PMC_PCKR(i)) & AT91_PMC_CSS;  in at91_pm_verify_clocks()
511 			pr_err("AT91: PM - Suspend-to-RAM with PCK%d src %d\n", i, css);  in at91_pm_verify_clocks()
527  * to add one generic API rather than lots of platform-specific ones.
561 		/* Store pull-down output impedance select. */  in at91_suspend_finish()
563 		soc_pm.bu->ddr_phy_calibration[0] = modified_fix_code[index] << DDR3PHY_ZQ0SR0_PDO_OFF;  in at91_suspend_finish()
565 		/* Store pull-up output impedance select. */  in at91_suspend_finish()
567 		soc_pm.bu->ddr_phy_calibration[0] |= modified_fix_code[index] << DDR3PHY_ZQ0SR0_PUO_OFF;  in at91_suspend_finish()
569 		/* Store pull-down on-die termination impedance select. */  in at91_suspend_finish()
571 		soc_pm.bu->ddr_phy_calibration[0] |= modified_fix_code[index] << DDR3PHY_ZQ0SR0_PDODT_OFF;  in at91_suspend_finish()
573 		/* Store pull-up on-die termination impedance select. */  in at91_suspend_finish()
575 		soc_pm.bu->ddr_phy_calibration[0] |= modified_fix_code[index] << DDR3PHY_ZQ0SRO_PUODT_OFF;  in at91_suspend_finish()
583 			soc_pm.bu->ddr_phy_calibration[i] =  in at91_suspend_finish()
584 				*((unsigned int *)soc_pm.memcs + (i - 1));  in at91_suspend_finish()
596  * at91_pm_switch_ba_to_auto() - Configure Backup Unit Power Switch
605  * required. If it is in software-controlled mode, it is switched to automatic
685 		pr_debug("AT91: PM - bogus suspend state %d\n", state);  in at91_pm_enter()
711 	.name = "cpuidle-at91",
715  * The AT91RM9200 goes into self-refresh mode with this command, and will
716  * terminate self-refresh automatically on the next SDRAM access.
718  * Self-refresh mode is exited as soon as a memory access is made, but we don't
719  * know for sure when that happens. However, we need to restore the low-power
720  * mode if it was enabled before going idle. Restoring low-power mode while
721  * still in self-refresh is "not recommended", but seems to work.
741 	/* Those two values allow us to delay self-refresh activation  in at91_ddr_standby()
747 	/* LPDDR1 --> force DDR2 mode during self-refresh */  in at91_ddr_standby()
771 	/* self-refresh mode now */  in at91_ddr_standby()
820 	/* self-refresh mode now */  in at91sam9_sdram_standby()
837 	ratio = readl(soc_pm.data.pmc + AT91_PMC_RATIO);  in sama7g5_standby()
840 	 * Place RAM into self-refresh after a maximum idle clocks. The maximum  in sama7g5_standby()
847 	writel(ratio & ~AT91_PMC_RATIO_RATIO, soc_pm.data.pmc + AT91_PMC_RATIO);  in sama7g5_standby()
852 	writel(ratio, soc_pm.data.pmc + AT91_PMC_RATIO);  in sama7g5_standby()
870 	{ .compatible = "atmel,at91rm9200-sdramc", .data = &ramc_infos[0] },
871 	{ .compatible = "atmel,at91sam9260-sdramc", .data = &ramc_infos[1] },
872 	{ .compatible = "atmel,at91sam9g45-ddramc", .data = &ramc_infos[2] },
873 	{ .compatible = "atmel,sama5d3-ddramc", .data = &ramc_infos[3] },
874 	{ .compatible = "microchip,sama7g5-uddrc", .data = &ramc_infos[4], },
879 	{ .compatible = "microchip,sama7g5-ddr3phy", },
896 			ret = -ENOMEM;  in at91_dt_ramc()
901 		ramc = of_id->data;  in at91_dt_ramc()
904 				standby = ramc->idle;  in at91_dt_ramc()
905 			soc_pm.data.memctrl = ramc->memctrl;  in at91_dt_ramc()
913 		ret = -ENODEV;  in at91_dt_ramc()
922 			ret = -ENOMEM;  in at91_dt_ramc()
930 		ret = -ENODEV;  in at91_dt_ramc()
945 		iounmap(soc_pm.data.ramc[--idx]);  in at91_dt_ramc()
954 	 * re-enabled by an interrupt or by a reset.  in at91rm9200_idle()
956 	writel(AT91_PMC_PCK, soc_pm.data.pmc + AT91_PMC_SCDR);  in at91rm9200_idle()
961 	writel(AT91_PMC_PCK, soc_pm.data.pmc + AT91_PMC_SCDR);  in at91sam9_idle()
973 	for_each_compatible_node(node, NULL, "mmio-sram") {  in at91_pm_sram_init()
986 	sram_pool = gen_pool_get(&pdev->dev, NULL);  in at91_pm_sram_init()
1012 	put_device(&pdev->dev);  in at91_pm_sram_init()
1055 	int ret = -ENODEV, located = 0;  in at91_pm_backup_init()
1059 		return -EPERM;  in at91_pm_backup_init()
1064 	np = of_find_compatible_node(NULL, NULL, "atmel,sama5d2-securam");  in at91_pm_backup_init()
1075 	sram_pool = gen_pool_get(&pdev->dev, NULL);  in at91_pm_backup_init()
1084 		ret = -ENOMEM;  in at91_pm_backup_init()
1088 	soc_pm.bu->suspended = 0;  in at91_pm_backup_init()
1089 	soc_pm.bu->canary = __pa_symbol(&canary);  in at91_pm_backup_init()
1090 	soc_pm.bu->resume = __pa_symbol(cpu_resume);  in at91_pm_backup_init()
1100 	put_device(&pdev->dev);  in at91_pm_backup_init()
1134 	{ .compatible = "atmel,sama5d2-shdwc" },
1135 	{ .compatible = "microchip,sam9x60-shdwc" },
1136 	{ .compatible = "microchip,sama7g5-shdwc" },
1141 	{ .compatible = "atmel,sama5d3-gem" },
1142 	{ .compatible = "atmel,sama5d2-gem" },
1143 	{ .compatible = "atmel,sama5d29-gem" },
1144 	{ .compatible = "microchip,sama7g5-gem" },
1149 	{ .compatible = "atmel,sama5d3-macb" },
1150 	{ .compatible = "microchip,sama7g5-emac" },
1256 		np = of_find_compatible_node(NULL, NULL, "atmel,sama5d2-sfrbu");  in at91_pm_modes_init()
1279 			gmac->np = np;  in at91_pm_modes_init()
1280 			at91_pm_get_eth_clks(np, gmac->clks);  in at91_pm_modes_init()
1285 			if (at91_pm_eth_clks_empty(gmac->clks))  in at91_pm_modes_init()
1289 			emac->np = np;  in at91_pm_modes_init()
1290 			ret = at91_pm_get_eth_clks(np, emac->clks);  in at91_pm_modes_init()
1291 			if (ret && at91_pm_eth_clks_empty(gmac->clks)) {  in at91_pm_modes_init()
1292 				of_node_put(gmac->np);  in at91_pm_modes_init()
1293 				of_node_put(emac->np);  in at91_pm_modes_init()
1294 				gmac->np = NULL;  in at91_pm_modes_init()
1295 				emac->np = NULL;  in at91_pm_modes_init()
1359 	{ .compatible = "atmel,at91rm9200-pmc", .data = &pmc_infos[0] },
1360 	{ .compatible = "atmel,at91sam9260-pmc", .data = &pmc_infos[1] },
1361 	{ .compatible = "atmel,at91sam9261-pmc", .data = &pmc_infos[1] },
1362 	{ .compatible = "atmel,at91sam9263-pmc", .data = &pmc_infos[1] },
1363 	{ .compatible = "atmel,at91sam9g45-pmc", .data = &pmc_infos[2] },
1364 	{ .compatible = "atmel,at91sam9n12-pmc", .data = &pmc_infos[1] },
1365 	{ .compatible = "atmel,at91sam9rl-pmc", .data = &pmc_infos[3] },
1366 	{ .compatible = "atmel,at91sam9x5-pmc", .data = &pmc_infos[1] },
1367 	{ .compatible = "atmel,sama5d3-pmc", .data = &pmc_infos[1] },
1368 	{ .compatible = "atmel,sama5d4-pmc", .data = &pmc_infos[1] },
1369 	{ .compatible = "atmel,sama5d2-pmc", .data = &pmc_infos[1] },
1370 	{ .compatible = "microchip,sam9x60-pmc", .data = &pmc_infos[4] },
1371 	{ .compatible = "microchip,sama7g5-pmc", .data = &pmc_infos[5] },
1424 	const struct pmc_info *pmc;  in at91_pm_init()  local
1430 	soc_pm.data.pmc = of_iomap(pmc_np, 0);  in at91_pm_init()
1432 	if (!soc_pm.data.pmc) {  in at91_pm_init()
1433 		pr_err("AT91: PM not supported, PMC not found\n");  in at91_pm_init()
1437 	pmc = of_id->data;  in at91_pm_init()
1438 	soc_pm.data.uhp_udp_mask = pmc->uhp_udp_mask;  in at91_pm_init()
1439 	soc_pm.data.pmc_mckr_offset = pmc->mckr;  in at91_pm_init()
1440 	soc_pm.data.pmc_version = pmc->version;  in at91_pm_init()
1477 	 * AT91RM9200 SDRAM low-power mode cannot be used with self-refresh.  in at91rm9200_pm_init()