1 // SPDX-License-Identifier: GPL-2.0-or-later
3  * arch/arm/mach-at91/pm.c
35  * struct at91_pm_bu - AT91 power management backup unit data structure
36  * @suspended: true if suspended to backup mode
38  * @canary: canary data for memory checking after exit from backup mode
40  * @ddr_phy_calibration: DDR PHY calibration data: ZQ0CR0, first 8 words
52  * struct at91_pm_sfrbu_regs - registers mapping for SFRBU
65  * enum at91_pm_eth_clk - Ethernet clock indexes
77  * enum at91_pm_eth - Ethernet controller indexes
89  * struct at91_pm_quirk_eth - AT91 PM Ethernet quirks
107  * struct at91_pm_quirks - AT91 PM quirks
115  * struct at91_soc_pm - AT91 SoC power management data structure
119  * @bu: backup unit mapped data (for backup mode)
137  * enum at91_pm_iomaps - IOs that needs to be mapped for different PM modes
160 	{ AT91_PM_ULP0_FAST,    "ulp0-fast" },
162 	{ AT91_PM_BACKUP,	"backup" },
163 	{ -1, NULL },
203 	{ .compatible = "atmel,sama5d2-gem",		.data = &ws_info[0] },
204 	{ .compatible = "atmel,sama5d2-rtc",		.data = &ws_info[1] },
205 	{ .compatible = "atmel,sama5d3-udc",		.data = &ws_info[2] },
206 	{ .compatible = "atmel,at91rm9200-ohci",	.data = &ws_info[2] },
207 	{ .compatible = "usb-ohci",			.data = &ws_info[2] },
208 	{ .compatible = "atmel,at91sam9g45-ehci",	.data = &ws_info[2] },
209 	{ .compatible = "usb-ehci",			.data = &ws_info[2] },
210 	{ .compatible = "atmel,sama5d2-sdhci",		.data = &ws_info[3] },
215 	{ .compatible = "microchip,sam9x60-rtc",	.data = &ws_info[1] },
216 	{ .compatible = "atmel,at91rm9200-ohci",	.data = &ws_info[2] },
217 	{ .compatible = "usb-ohci",			.data = &ws_info[2] },
218 	{ .compatible = "atmel,at91sam9g45-ehci",	.data = &ws_info[2] },
219 	{ .compatible = "usb-ehci",			.data = &ws_info[2] },
220 	{ .compatible = "microchip,sam9x60-rtt",	.data = &ws_info[4] },
221 	{ .compatible = "cdns,sam9x60-macb",		.data = &ws_info[5] },
226 	{ .compatible = "microchip,sama7g5-rtc",	.data = &ws_info[1] },
227 	{ .compatible = "microchip,sama7g5-ohci",	.data = &ws_info[2] },
228 	{ .compatible = "usb-ohci",			.data = &ws_info[2] },
229 	{ .compatible = "atmel,at91sam9g45-ehci",	.data = &ws_info[2] },
230 	{ .compatible = "usb-ehci",			.data = &ws_info[2] },
231 	{ .compatible = "microchip,sama7g5-sdhci",	.data = &ws_info[3] },
232 	{ .compatible = "microchip,sama7g5-rtt",	.data = &ws_info[4] },
248 		return -EPERM;  in at91_pm_config_ws()
267 		if (device_may_wakeup(&pdev->dev)) {  in at91_pm_config_ws()
268 			wsi = match->data;  in at91_pm_config_ws()
271 			if (wsi->shdwc_mr_bit && !(val & wsi->shdwc_mr_bit))  in at91_pm_config_ws()
274 			mode |= wsi->pmc_fsmr_bit;  in at91_pm_config_ws()
275 			if (wsi->set_polarity)  in at91_pm_config_ws()
276 				polarity |= wsi->pmc_fsmr_bit;  in at91_pm_config_ws()
280 		put_device(&pdev->dev);  in at91_pm_config_ws()
290 	return mode ? 0 : -EPERM;  in at91_pm_config_ws()
326 	if (!eth->np)  in at91_pm_eth_quirk_is_valid()
330 	if (!(eth->modes & BIT(soc_pm.data.mode)))  in at91_pm_eth_quirk_is_valid()
333 	if (!eth->dev) {  in at91_pm_eth_quirk_is_valid()
335 		pdev = of_find_device_by_node(eth->np);  in at91_pm_eth_quirk_is_valid()
338 		/* put_device(eth->dev) is called at the end of suspend. */  in at91_pm_eth_quirk_is_valid()
339 		eth->dev = &pdev->dev;  in at91_pm_eth_quirk_is_valid()
343 	if (!device_may_wakeup(eth->dev))  in at91_pm_eth_quirk_is_valid()
376 		if (suspend && eth->dns_modes & BIT(soc_pm.data.mode)) {  in at91_pm_config_quirks()
382 				if (ws->dev == eth->dev)  in at91_pm_config_quirks()
397 				ret = -EPERM;  in at91_pm_config_quirks()
398 				put_device(eth->dev);  in at91_pm_config_quirks()
399 				eth->dev = NULL;  in at91_pm_config_quirks()
401 				i--;  in at91_pm_config_quirks()
407 			clk_bulk_disable_unprepare(AT91_PM_ETH_MAX_CLK, eth->clks);  in at91_pm_config_quirks()
410 						      eth->clks);  in at91_pm_config_quirks()
414 			 * Release the reference to eth->dev taken in  in at91_pm_config_quirks()
417 			put_device(eth->dev);  in at91_pm_config_quirks()
418 			eth->dev = NULL;  in at91_pm_config_quirks()
430 	for (j = i; j >= 0; j--) {  in at91_pm_config_quirks()
436 			tmp = clk_bulk_prepare_enable(AT91_PM_ETH_MAX_CLK, eth->clks);  in at91_pm_config_quirks()
444 		 * Release the reference to eth->dev taken in  in at91_pm_config_quirks()
447 		put_device(eth->dev);  in at91_pm_config_quirks()
448 		eth->dev = NULL;  in at91_pm_config_quirks()
471 		soc_pm.data.mode = -1;  in at91_pm_begin()
479 		soc_pm.bu->suspended = 1;  in at91_pm_begin()
481 		soc_pm.bu->suspended = 0;  in at91_pm_begin()
488  * slow-clock mode.
499 		pr_err("AT91: PM - Suspend-to-RAM with USB still active\n");  in at91_pm_verify_clocks()
511 			pr_err("AT91: PM - Suspend-to-RAM with PCK%d src %d\n", i, css);  in at91_pm_verify_clocks()
527  * to add one generic API rather than lots of platform-specific ones.
552 		 * Bootloader will perform DDR recalibration and will try to  in at91_suspend_finish()
560 		/* Store pull-down output impedance select. */  in at91_suspend_finish()
562 		soc_pm.bu->ddr_phy_calibration[0] = modified_gray_code[index];  in at91_suspend_finish()
564 		/* Store pull-up output impedance select. */  in at91_suspend_finish()
566 		soc_pm.bu->ddr_phy_calibration[0] |= modified_gray_code[index];  in at91_suspend_finish()
568 		/* Store pull-down on-die termination impedance select. */  in at91_suspend_finish()
570 		soc_pm.bu->ddr_phy_calibration[0] |= modified_gray_code[index];  in at91_suspend_finish()
572 		/* Store pull-up on-die termination impedance select. */  in at91_suspend_finish()
574 		soc_pm.bu->ddr_phy_calibration[0] |= modified_gray_code[index];  in at91_suspend_finish()
578 		 * of DDR PHY recalibration; it is saved here in securam and it  in at91_suspend_finish()
582 			soc_pm.bu->ddr_phy_calibration[i] =  in at91_suspend_finish()
583 				*((unsigned int *)soc_pm.memcs + (i - 1));  in at91_suspend_finish()
646  * AT91_PM_BACKUP turns off the whole SoC after placing the DDR in self refresh
675 		pr_debug("AT91: PM - bogus suspend state %d\n", state);  in at91_pm_enter()
701 	.name = "cpuidle-at91",
705  * The AT91RM9200 goes into self-refresh mode with this command, and will
706  * terminate self-refresh automatically on the next SDRAM access.
708  * Self-refresh mode is exited as soon as a memory access is made, but we don't
709  * know for sure when that happens. However, we need to restore the low-power
710  * mode if it was enabled before going idle. Restoring low-power mode while
711  * still in self-refresh is "not recommended", but seems to work.
731 	/* Those two values allow us to delay self-refresh activation  in at91_ddr_standby()
737 	/* LPDDR1 --> force DDR2 mode during self-refresh */  in at91_ddr_standby()
761 	/* self-refresh mode now */  in at91_ddr_standby()
810 	/* self-refresh mode now */  in at91sam9_sdram_standby()
830 	 * Place RAM into self-refresh after a maximum idle clocks. The maximum  in sama7g5_standby()
860 	{ .compatible = "atmel,at91rm9200-sdramc", .data = &ramc_infos[0] },
861 	{ .compatible = "atmel,at91sam9260-sdramc", .data = &ramc_infos[1] },
862 	{ .compatible = "atmel,at91sam9g45-ddramc", .data = &ramc_infos[2] },
863 	{ .compatible = "atmel,sama5d3-ddramc", .data = &ramc_infos[3] },
864 	{ .compatible = "microchip,sama7g5-uddrc", .data = &ramc_infos[4], },
869 	{ .compatible = "microchip,sama7g5-ddr3phy", },
886 			ret = -ENOMEM;  in at91_dt_ramc()
891 		ramc = of_id->data;  in at91_dt_ramc()
894 				standby = ramc->idle;  in at91_dt_ramc()
895 			soc_pm.data.memctrl = ramc->memctrl;  in at91_dt_ramc()
903 		ret = -ENODEV;  in at91_dt_ramc()
907 	/* Lookup for DDR PHY node, if any. */  in at91_dt_ramc()
912 			ret = -ENOMEM;  in at91_dt_ramc()
919 		pr_err("DDR PHY is mandatory!\n");  in at91_dt_ramc()
920 		ret = -ENODEV;  in at91_dt_ramc()
935 		iounmap(soc_pm.data.ramc[--idx]);  in at91_dt_ramc()
944 	 * re-enabled by an interrupt or by a reset.  in at91rm9200_idle()
963 	for_each_compatible_node(node, NULL, "mmio-sram") {  in at91_pm_sram_init()
976 	sram_pool = gen_pool_get(&pdev->dev, NULL);  in at91_pm_sram_init()
1002 	put_device(&pdev->dev);  in at91_pm_sram_init()
1045 	int ret = -ENODEV, located = 0;  in at91_pm_backup_init()
1049 		return -EPERM;  in at91_pm_backup_init()
1054 	np = of_find_compatible_node(NULL, NULL, "atmel,sama5d2-securam");  in at91_pm_backup_init()
1065 	sram_pool = gen_pool_get(&pdev->dev, NULL);  in at91_pm_backup_init()
1074 		ret = -ENOMEM;  in at91_pm_backup_init()
1078 	soc_pm.bu->suspended = 0;  in at91_pm_backup_init()
1079 	soc_pm.bu->canary = __pa_symbol(&canary);  in at91_pm_backup_init()
1080 	soc_pm.bu->resume = __pa_symbol(cpu_resume);  in at91_pm_backup_init()
1090 	put_device(&pdev->dev);  in at91_pm_backup_init()
1124 	{ .compatible = "atmel,sama5d2-shdwc" },
1125 	{ .compatible = "microchip,sam9x60-shdwc" },
1126 	{ .compatible = "microchip,sama7g5-shdwc" },
1131 	{ .compatible = "atmel,sama5d3-gem" },
1132 	{ .compatible = "atmel,sama5d2-gem" },
1133 	{ .compatible = "atmel,sama5d29-gem" },
1134 	{ .compatible = "microchip,sama7g5-gem" },
1139 	{ .compatible = "atmel,sama5d3-macb" },
1140 	{ .compatible = "microchip,sama7g5-emac" },
1246 		np = of_find_compatible_node(NULL, NULL, "atmel,sama5d2-sfrbu");  in at91_pm_modes_init()
1269 			gmac->np = np;  in at91_pm_modes_init()
1270 			at91_pm_get_eth_clks(np, gmac->clks);  in at91_pm_modes_init()
1275 			if (at91_pm_eth_clks_empty(gmac->clks))  in at91_pm_modes_init()
1279 			emac->np = np;  in at91_pm_modes_init()
1280 			ret = at91_pm_get_eth_clks(np, emac->clks);  in at91_pm_modes_init()
1281 			if (ret && at91_pm_eth_clks_empty(gmac->clks)) {  in at91_pm_modes_init()
1282 				of_node_put(gmac->np);  in at91_pm_modes_init()
1283 				of_node_put(emac->np);  in at91_pm_modes_init()
1284 				gmac->np = NULL;  in at91_pm_modes_init()
1285 				emac->np = NULL;  in at91_pm_modes_init()
1349 	{ .compatible = "atmel,at91rm9200-pmc", .data = &pmc_infos[0] },
1350 	{ .compatible = "atmel,at91sam9260-pmc", .data = &pmc_infos[1] },
1351 	{ .compatible = "atmel,at91sam9261-pmc", .data = &pmc_infos[1] },
1352 	{ .compatible = "atmel,at91sam9263-pmc", .data = &pmc_infos[1] },
1353 	{ .compatible = "atmel,at91sam9g45-pmc", .data = &pmc_infos[2] },
1354 	{ .compatible = "atmel,at91sam9n12-pmc", .data = &pmc_infos[1] },
1355 	{ .compatible = "atmel,at91sam9rl-pmc", .data = &pmc_infos[3] },
1356 	{ .compatible = "atmel,at91sam9x5-pmc", .data = &pmc_infos[1] },
1357 	{ .compatible = "atmel,sama5d3-pmc", .data = &pmc_infos[1] },
1358 	{ .compatible = "atmel,sama5d4-pmc", .data = &pmc_infos[1] },
1359 	{ .compatible = "atmel,sama5d2-pmc", .data = &pmc_infos[1] },
1360 	{ .compatible = "microchip,sam9x60-pmc", .data = &pmc_infos[4] },
1361 	{ .compatible = "microchip,sama7g5-pmc", .data = &pmc_infos[5] },
1427 	pmc = of_id->data;  in at91_pm_init()
1428 	soc_pm.data.uhp_udp_mask = pmc->uhp_udp_mask;  in at91_pm_init()
1429 	soc_pm.data.pmc_mckr_offset = pmc->mckr;  in at91_pm_init()
1430 	soc_pm.data.pmc_version = pmc->version;  in at91_pm_init()
1467 	 * AT91RM9200 SDRAM low-power mode cannot be used with self-refresh.  in at91rm9200_pm_init()