226 	u32 dscr;  in monitor_mode_enabled()  local
227 	ARM_DBG_READ(c0, c1, 0, dscr);  in monitor_mode_enabled()
228 	return !!(dscr & ARM_DSCR_MDBGEN);  in monitor_mode_enabled()
233 	u32 dscr;  in enable_monitor_mode()  local
234 	ARM_DBG_READ(c0, c1, 0, dscr);  in enable_monitor_mode()
237 	if (dscr & ARM_DSCR_MDBGEN)  in enable_monitor_mode()
244 		ARM_DBG_WRITE(c0, c1, 0, (dscr | ARM_DSCR_MDBGEN));  in enable_monitor_mode()
252 		ARM_DBG_WRITE(c0, c2, 2, (dscr | ARM_DSCR_MDBGEN));  in enable_monitor_mode()
260 	ARM_DBG_READ(c0, c1, 0, dscr);  in enable_monitor_mode()
261 	if (!(dscr & ARM_DSCR_MDBGEN)) {  in enable_monitor_mode()
914 	u32 dscr;  in hw_breakpoint_pending()  local
922 	ARM_DBG_READ(c0, c1, 0, dscr);  in hw_breakpoint_pending()
925 	switch (ARM_DSCR_MOE(dscr)) {  in hw_breakpoint_pending()