ti/omap/omap36xx.dtsi

1 // SPDX-License-Identifier: GPL-2.0-only
5  * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/bus/ti-sysc.h>
9 #include <dt-bindings/media/omap3-isp.h>
21 			operating-points-v2 = <&cpu0_opp_table>;
23 			vbb-supply = <&abb_mpu_iva>;
24 			clock-latency = <300000>; /* From omap-cpufreq driver */
25 			#cooling-cells = <2>;
29 	cpu0_opp_table: opp-table {
30 		compatible = "operating-points-v2-ti-cpu";
33 		opp-50-300000000 {
35 			opp-hz = /bits/ 64 <300000000>;
38 			 * Table 4-19 of the DM3730 Data sheet (SPRS685B)
39 			 * Format is:	cpu0-supply:	<target min max>
40 			 *		vbb-supply:	<target min max>
42 			opp-microvolt = <1012500 1012500 1012500>,
48 			opp-supported-hw = <0xffffffff 3>;
49 			opp-suspend;
52 		opp-100-600000000 {
54 			opp-hz = /bits/ 64 <600000000>;
55 			opp-microvolt = <1200000 1200000 1200000>,
57 			opp-supported-hw = <0xffffffff 3>;
60 		opp-130-800000000 {
62 			opp-hz = /bits/ 64 <800000000>;
63 			opp-microvolt = <1325000 1325000 1325000>,
65 			opp-supported-hw = <0xffffffff 3>;
68 		opp-1000000000 {
70 			opp-hz = /bits/ 64 <1000000000>;
71 			opp-microvolt = <1375000 1375000 1375000>,
73 			/* only on am/dm37x with speed-binned bit set */
74 			opp-supported-hw = <0xffffffff 2>;
75 			turbo-mode;
79 	opp_supply_mpu_iva: opp-supply {
80 		compatible = "ti,omap-opp-supply";
81 		ti,absolute-max-voltage-uv = <1375000>;
86 			compatible = "ti,omap3-uart";
90 			dma-names = "tx", "rx";
92 			clock-frequency = <48000000>;
95 		abb_mpu_iva: regulator-abb-mpu {
96 			compatible = "ti,abb-v1";
97 			regulator-name = "abb_mpu_iva";
98 			#address-cells = <0>;
99 			#size-cells = <0>;
101 			reg-names = "base-address", "int-address";
102 			ti,tranxdone-status-mask = <0x4000000>;
104 			ti,settling-time = <30>;
105 			ti,clock-cycles = <8>;
116 			compatible = "ti,omap3-padconf", "pinctrl-single";
118 			#address-cells = <1>;
119 			#size-cells = <0>;
120 			#pinctrl-cells = <1>;
121 			#interrupt-cells = <1>;
122 			interrupt-controller;
123 			pinctrl-single,register-width = <16>;
124 			pinctrl-single,function-mask = <0xff1f>;
128 			compatible = "ti,omap3-isp";
134 			ti,phy-type = <OMAP3ISP_PHY_TYPE_CSIPHY>;
135 			#clock-cells = <1>;
137 				#address-cells = <1>;
138 				#size-cells = <0>;
144 			compatible = "ti,omap36xx-bandgap";
145 			#thermal-sensor-cells = <0>;
148 		target-module@480cb000 {
149 			compatible = "ti,sysc-omap3630-sr", "ti,sysc";
152 			reg-names = "sysc";
153 			ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
154 			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
158 			clock-names = "fck";
159 			#address-cells = <1>;
160 			#size-cells = <1>;
164 				compatible = "ti,omap3-smartreflex-core";
170 		target-module@480c9000 {
171 			compatible = "ti,sysc-omap3630-sr", "ti,sysc";
174 			reg-names = "sysc";
175 			ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
176 			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
180 			clock-names = "fck";
181 			#address-cells = <1>;
182 			#size-cells = <1>;
187 				compatible = "ti,omap3-smartreflex-mpu-iva";
195 		 * "ti,sysc-omap4" type register with just sidle and midle bits
196 		 * available while omap34xx has "ti,sysc-omap2" type sysconfig.
198 		sgx_module: target-module@50000000 {
199 			compatible = "ti,sysc-omap4", "ti,sysc";
202 			reg-names = "rev", "sysc";
203 			ti,sysc-midle = <SYSC_IDLE_FORCE>,
206 			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
210 			clock-names = "fck", "ick";
211 			#address-cells = <1>;
212 			#size-cells = <1>;
222 	thermal_zones: thermal-zones {
223 		#include "omap3-cpu-thermal.dtsi"
228 	compatible = "ti,omap3630-sdma", "ti,omap-sdma";
234 	clock-names = "fck", "tv_dac_clk";
243 	clock-names = "ssi_ssr_fck",
252 /include/ "omap34xx-omap36xx-clocks.dtsi"
253 /include/ "omap36xx-omap3430es2plus-clocks.dtsi"
254 /include/ "omap36xx-am35xx-omap3430es2plus-clocks.dtsi"
255 /include/ "omap36xx-clocks.dtsi"