Lines Matching +full:opp +full:- +full:300000000

1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
11 /delete-node/ &aes1_target;
12 /delete-node/ &aes2_target;
23 operating-points-v2 = <&cpu0_opp_table>;
25 clock-latency = <300000>; /* From legacy driver */
29 cpu0_opp_table: opp-table {
30 compatible = "operating-points-v2-ti-cpu";
37 opp-50-300000000 {
39 opp-hz = /bits/ 64 <300000000>;
40 opp-microvolt = <1200000>;
41 opp-supported-hw = <0xffffffff 0xffffffff>;
42 opp-suspend;
45 opp-100-600000000 {
47 opp-hz = /bits/ 64 <600000000>;
48 opp-microvolt = <1200000>;
49 opp-supported-hw = <0xffffffff 0xffffffff>;
54 target-module@5c040000 {
55 compatible = "ti,sysc-omap2", "ti,sysc";
59 reg-names = "rev", "sysc", "syss";
60 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
63 ti,sysc-midle = <SYSC_IDLE_FORCE>,
66 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
69 ti,syss-mask = <1>;
71 clock-names = "fck";
72 #address-cells = <1>;
73 #size-cells = <1>;
77 compatible = "ti,omap3-musb";
81 interrupt-names = "mc";
86 compatible = "ti,am3517-emac";
92 ti,davinci-ctrl-reg-offset = <0x10000>;
93 ti,davinci-ctrl-mod-reg-offset = <0>;
94 ti,davinci-ctrl-ram-offset = <0x20000>;
95 ti,davinci-ctrl-ram-size = <0x2000>;
96 ti,davinci-rmii-en = /bits/ 8 <1>;
97 local-mac-address = [ 00 00 00 00 00 00 ];
99 clock-names = "ick";
108 #address-cells = <1>;
109 #size-cells = <0>;
111 clock-names = "fck";
115 compatible = "ti,omap3-uart";
121 dma-names = "tx", "rx";
122 clock-frequency = <48000000>;
126 compatible = "ti,omap3-padconf", "pinctrl-single";
128 #address-cells = <1>;
129 #size-cells = <0>;
130 #pinctrl-cells = <1>;
131 #interrupt-cells = <1>;
132 interrupt-controller;
133 pinctrl-single,register-width = <16>;
134 pinctrl-single,function-mask = <0xff1f>;
138 compatible = "ti,am3517-hecc";
143 reg-names = "hecc", "hecc-ram", "mbx";
152 * write-only at 0x50000e10. We detect SGX based on the SGX
156 sgx_module: target-module@50000000 {
157 compatible = "ti,sysc-omap2", "ti,sysc";
159 reg-names = "rev";
161 clock-names = "fck", "ick";
162 #address-cells = <1>;
163 #size-cells = <1>;
177 /delete-property/ clocks;
180 /* Table Table 5-79 of the TRM shows 480ab000 is reserved */
197 #include "am35xx-clocks.dtsi"
198 #include "omap36xx-am35xx-omap3430es2plus-clocks.dtsi"
200 /* Preferred always-on timer for clocksource */
202 ti,no-reset-on-init;
203 ti,no-idle;
205 assigned-clocks = <&gpt1_fck>;
206 assigned-clock-parents = <&sys_ck>;
212 ti,no-reset-on-init;
213 ti,no-idle;
215 assigned-clocks = <&gpt2_fck>;
216 assigned-clock-parents = <&sys_ck>;