Lines Matching +full:stm32 +full:- +full:pwm +full:- +full:lp
1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/stm32mp1-clks.h>
8 #include <dt-bindings/reset/stm32mp1-resets.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a7";
20 clock-frequency = <650000000>;
26 arm-pmu {
27 compatible = "arm,cortex-a7-pmu";
29 interrupt-affinity = <&cpu0>;
30 interrupt-parent = <&intc>;
34 compatible = "arm,psci-1.0";
38 intc: interrupt-controller@a0021000 {
39 compatible = "arm,cortex-a7-gic";
40 #interrupt-cells = <3>;
41 interrupt-controller;
47 compatible = "arm,armv7-timer";
52 interrupt-parent = <&intc>;
53 arm,no-tick-in-suspend;
57 clk_hse: clk-hse {
58 #clock-cells = <0>;
59 compatible = "fixed-clock";
60 clock-frequency = <24000000>;
63 clk_hsi: clk-hsi {
64 #clock-cells = <0>;
65 compatible = "fixed-clock";
66 clock-frequency = <64000000>;
69 clk_lse: clk-lse {
70 #clock-cells = <0>;
71 compatible = "fixed-clock";
72 clock-frequency = <32768>;
75 clk_lsi: clk-lsi {
76 #clock-cells = <0>;
77 compatible = "fixed-clock";
78 clock-frequency = <32000>;
81 clk_csi: clk-csi {
82 #clock-cells = <0>;
83 compatible = "fixed-clock";
84 clock-frequency = <4000000>;
88 thermal-zones {
89 cpu_thermal: cpu-thermal {
90 polling-delay-passive = <0>;
91 polling-delay = <0>;
92 thermal-sensors = <&dts>;
95 cpu_alert1: cpu-alert1 {
101 cpu-crit {
108 cooling-maps {
113 booster: regulator-booster {
114 compatible = "st,stm32mp1-booster";
120 compatible = "simple-bus";
121 #address-cells = <1>;
122 #size-cells = <1>;
123 interrupt-parent = <&intc>;
127 #address-cells = <1>;
128 #size-cells = <0>;
129 compatible = "st,stm32-timers";
132 interrupt-names = "global";
134 clock-names = "int";
140 dma-names = "ch1", "ch2", "ch3", "ch4", "up";
143 pwm {
144 compatible = "st,stm32-pwm";
145 #pwm-cells = <3>;
150 compatible = "st,stm32h7-timer-trigger";
156 compatible = "st,stm32-timer-counter";
162 #address-cells = <1>;
163 #size-cells = <0>;
164 compatible = "st,stm32-timers";
167 interrupt-names = "global";
169 clock-names = "int";
176 dma-names = "ch1", "ch2", "ch3", "ch4", "up", "trig";
179 pwm {
180 compatible = "st,stm32-pwm";
181 #pwm-cells = <3>;
186 compatible = "st,stm32h7-timer-trigger";
192 compatible = "st,stm32-timer-counter";
198 #address-cells = <1>;
199 #size-cells = <0>;
200 compatible = "st,stm32-timers";
203 interrupt-names = "global";
205 clock-names = "int";
210 dma-names = "ch1", "ch2", "ch3", "ch4";
213 pwm {
214 compatible = "st,stm32-pwm";
215 #pwm-cells = <3>;
220 compatible = "st,stm32h7-timer-trigger";
226 compatible = "st,stm32-timer-counter";
232 #address-cells = <1>;
233 #size-cells = <0>;
234 compatible = "st,stm32-timers";
237 interrupt-names = "global";
239 clock-names = "int";
246 dma-names = "ch1", "ch2", "ch3", "ch4", "up", "trig";
249 pwm {
250 compatible = "st,stm32-pwm";
251 #pwm-cells = <3>;
256 compatible = "st,stm32h7-timer-trigger";
262 compatible = "st,stm32-timer-counter";
268 #address-cells = <1>;
269 #size-cells = <0>;
270 compatible = "st,stm32-timers";
273 interrupt-names = "global";
275 clock-names = "int";
277 dma-names = "up";
281 compatible = "st,stm32h7-timer-trigger";
288 #address-cells = <1>;
289 #size-cells = <0>;
290 compatible = "st,stm32-timers";
293 interrupt-names = "global";
295 clock-names = "int";
297 dma-names = "up";
301 compatible = "st,stm32h7-timer-trigger";
308 #address-cells = <1>;
309 #size-cells = <0>;
310 compatible = "st,stm32-timers";
313 interrupt-names = "global";
315 clock-names = "int";
318 pwm {
319 compatible = "st,stm32-pwm";
320 #pwm-cells = <3>;
325 compatible = "st,stm32h7-timer-trigger";
332 #address-cells = <1>;
333 #size-cells = <0>;
334 compatible = "st,stm32-timers";
337 interrupt-names = "global";
339 clock-names = "int";
342 pwm {
343 compatible = "st,stm32-pwm";
344 #pwm-cells = <3>;
349 compatible = "st,stm32h7-timer-trigger";
356 #address-cells = <1>;
357 #size-cells = <0>;
358 compatible = "st,stm32-timers";
361 interrupt-names = "global";
363 clock-names = "int";
366 pwm {
367 compatible = "st,stm32-pwm";
368 #pwm-cells = <3>;
373 compatible = "st,stm32h7-timer-trigger";
380 #address-cells = <1>;
381 #size-cells = <0>;
382 compatible = "st,stm32-lptimer";
384 interrupts-extended = <&exti 47 IRQ_TYPE_LEVEL_HIGH>;
386 clock-names = "mux";
387 wakeup-source;
390 pwm {
391 compatible = "st,stm32-pwm-lp";
392 #pwm-cells = <3>;
397 compatible = "st,stm32-lptimer-trigger";
403 compatible = "st,stm32-lptimer-counter";
409 #address-cells = <1>;
410 #size-cells = <0>;
411 compatible = "st,stm32h7-spi";
418 dma-names = "rx", "tx";
422 i2s2: audio-controller@4000b000 {
423 compatible = "st,stm32h7-i2s";
424 #sound-dai-cells = <0>;
429 dma-names = "rx", "tx";
434 #address-cells = <1>;
435 #size-cells = <0>;
436 compatible = "st,stm32h7-spi";
443 dma-names = "rx", "tx";
447 i2s3: audio-controller@4000c000 {
448 compatible = "st,stm32h7-i2s";
449 #sound-dai-cells = <0>;
454 dma-names = "rx", "tx";
458 spdifrx: audio-controller@4000d000 {
459 compatible = "st,stm32h7-spdifrx";
460 #sound-dai-cells = <0>;
463 clock-names = "kclk";
467 dma-names = "rx", "rx-ctrl";
472 compatible = "st,stm32h7-uart";
474 interrupts-extended = <&exti 27 IRQ_TYPE_LEVEL_HIGH>;
476 wakeup-source;
479 dma-names = "rx", "tx";
484 compatible = "st,stm32h7-uart";
486 interrupts-extended = <&exti 28 IRQ_TYPE_LEVEL_HIGH>;
488 wakeup-source;
491 dma-names = "rx", "tx";
496 compatible = "st,stm32h7-uart";
498 interrupts-extended = <&exti 30 IRQ_TYPE_LEVEL_HIGH>;
500 wakeup-source;
503 dma-names = "rx", "tx";
508 compatible = "st,stm32h7-uart";
510 interrupts-extended = <&exti 31 IRQ_TYPE_LEVEL_HIGH>;
512 wakeup-source;
515 dma-names = "rx", "tx";
520 compatible = "st,stm32mp15-i2c";
522 interrupt-names = "event", "error";
527 #address-cells = <1>;
528 #size-cells = <0>;
529 st,syscfg-fmp = <&syscfg 0x4 0x1>;
530 wakeup-source;
531 i2c-analog-filter;
536 compatible = "st,stm32mp15-i2c";
538 interrupt-names = "event", "error";
543 #address-cells = <1>;
544 #size-cells = <0>;
545 st,syscfg-fmp = <&syscfg 0x4 0x2>;
546 wakeup-source;
547 i2c-analog-filter;
552 compatible = "st,stm32mp15-i2c";
554 interrupt-names = "event", "error";
559 #address-cells = <1>;
560 #size-cells = <0>;
561 st,syscfg-fmp = <&syscfg 0x4 0x4>;
562 wakeup-source;
563 i2c-analog-filter;
568 compatible = "st,stm32mp15-i2c";
570 interrupt-names = "event", "error";
575 #address-cells = <1>;
576 #size-cells = <0>;
577 st,syscfg-fmp = <&syscfg 0x4 0x10>;
578 wakeup-source;
579 i2c-analog-filter;
584 compatible = "st,stm32-cec";
588 clock-names = "cec", "hdmi-cec";
593 compatible = "st,stm32h7-dac-core";
596 clock-names = "pclk";
597 #address-cells = <1>;
598 #size-cells = <0>;
602 compatible = "st,stm32-dac";
603 #io-channel-cells = <1>;
609 compatible = "st,stm32-dac";
610 #io-channel-cells = <1>;
617 compatible = "st,stm32h7-uart";
619 interrupts-extended = <&exti 32 IRQ_TYPE_LEVEL_HIGH>;
621 wakeup-source;
624 dma-names = "rx", "tx";
629 compatible = "st,stm32h7-uart";
631 interrupts-extended = <&exti 33 IRQ_TYPE_LEVEL_HIGH>;
633 wakeup-source;
636 dma-names = "rx", "tx";
641 #address-cells = <1>;
642 #size-cells = <0>;
643 compatible = "st,stm32-timers";
649 interrupt-names = "brk", "up", "trg-com", "cc";
651 clock-names = "int";
659 dma-names = "ch1", "ch2", "ch3", "ch4",
663 pwm {
664 compatible = "st,stm32-pwm";
665 #pwm-cells = <3>;
670 compatible = "st,stm32h7-timer-trigger";
676 compatible = "st,stm32-timer-counter";
682 #address-cells = <1>;
683 #size-cells = <0>;
684 compatible = "st,stm32-timers";
690 interrupt-names = "brk", "up", "trg-com", "cc";
692 clock-names = "int";
700 dma-names = "ch1", "ch2", "ch3", "ch4",
704 pwm {
705 compatible = "st,stm32-pwm";
706 #pwm-cells = <3>;
711 compatible = "st,stm32h7-timer-trigger";
717 compatible = "st,stm32-timer-counter";
723 compatible = "st,stm32h7-uart";
725 interrupts-extended = <&exti 29 IRQ_TYPE_LEVEL_HIGH>;
727 wakeup-source;
730 dma-names = "rx", "tx";
735 #address-cells = <1>;
736 #size-cells = <0>;
737 compatible = "st,stm32h7-spi";
744 dma-names = "rx", "tx";
748 i2s1: audio-controller@44004000 {
749 compatible = "st,stm32h7-i2s";
750 #sound-dai-cells = <0>;
755 dma-names = "rx", "tx";
760 #address-cells = <1>;
761 #size-cells = <0>;
762 compatible = "st,stm32h7-spi";
769 dma-names = "rx", "tx";
774 #address-cells = <1>;
775 #size-cells = <0>;
776 compatible = "st,stm32-timers";
779 interrupt-names = "global";
781 clock-names = "int";
786 dma-names = "ch1", "up", "trig", "com";
789 pwm {
790 compatible = "st,stm32-pwm";
791 #pwm-cells = <3>;
796 compatible = "st,stm32h7-timer-trigger";
803 #address-cells = <1>;
804 #size-cells = <0>;
805 compatible = "st,stm32-timers";
808 interrupt-names = "global";
810 clock-names = "int";
813 dma-names = "ch1", "up";
816 pwm {
817 compatible = "st,stm32-pwm";
818 #pwm-cells = <3>;
822 compatible = "st,stm32h7-timer-trigger";
829 #address-cells = <1>;
830 #size-cells = <0>;
831 compatible = "st,stm32-timers";
834 interrupt-names = "global";
836 clock-names = "int";
839 dma-names = "ch1", "up";
842 pwm {
843 compatible = "st,stm32-pwm";
844 #pwm-cells = <3>;
849 compatible = "st,stm32h7-timer-trigger";
856 #address-cells = <1>;
857 #size-cells = <0>;
858 compatible = "st,stm32h7-spi";
865 dma-names = "rx", "tx";
870 compatible = "st,stm32h7-sai";
871 #address-cells = <1>;
872 #size-cells = <1>;
879 sai1a: audio-controller@4400a004 {
880 #sound-dai-cells = <0>;
882 compatible = "st,stm32-sai-sub-a";
885 clock-names = "sai_ck";
890 sai1b: audio-controller@4400a024 {
891 #sound-dai-cells = <0>;
892 compatible = "st,stm32-sai-sub-b";
895 clock-names = "sai_ck";
902 compatible = "st,stm32h7-sai";
903 #address-cells = <1>;
904 #size-cells = <1>;
911 sai2a: audio-controller@4400b004 {
912 #sound-dai-cells = <0>;
913 compatible = "st,stm32-sai-sub-a";
916 clock-names = "sai_ck";
921 sai2b: audio-controller@4400b024 {
922 #sound-dai-cells = <0>;
923 compatible = "st,stm32-sai-sub-b";
926 clock-names = "sai_ck";
933 compatible = "st,stm32h7-sai";
934 #address-cells = <1>;
935 #size-cells = <1>;
942 sai3a: audio-controller@4400c004 {
943 #sound-dai-cells = <0>;
944 compatible = "st,stm32-sai-sub-a";
947 clock-names = "sai_ck";
952 sai3b: audio-controller@4400c024 {
953 #sound-dai-cells = <0>;
954 compatible = "st,stm32-sai-sub-b";
957 clock-names = "sai_ck";
964 compatible = "st,stm32mp1-dfsdm";
967 clock-names = "dfsdm";
968 #address-cells = <1>;
969 #size-cells = <0>;
973 compatible = "st,stm32-dfsdm-adc";
974 #io-channel-cells = <1>;
978 dma-names = "rx";
983 compatible = "st,stm32-dfsdm-adc";
984 #io-channel-cells = <1>;
988 dma-names = "rx";
993 compatible = "st,stm32-dfsdm-adc";
994 #io-channel-cells = <1>;
998 dma-names = "rx";
1003 compatible = "st,stm32-dfsdm-adc";
1004 #io-channel-cells = <1>;
1008 dma-names = "rx";
1013 compatible = "st,stm32-dfsdm-adc";
1014 #io-channel-cells = <1>;
1018 dma-names = "rx";
1023 compatible = "st,stm32-dfsdm-adc";
1024 #io-channel-cells = <1>;
1028 dma-names = "rx";
1033 dma1: dma-controller@48000000 {
1034 compatible = "st,stm32-dma";
1046 #dma-cells = <4>;
1048 dma-requests = <8>;
1051 dma2: dma-controller@48001000 {
1052 compatible = "st,stm32-dma";
1064 #dma-cells = <4>;
1066 dma-requests = <8>;
1069 dmamux1: dma-router@48002000 {
1070 compatible = "st,stm32h7-dmamux";
1072 #dma-cells = <3>;
1073 dma-requests = <128>;
1074 dma-masters = <&dma1 &dma2>;
1075 dma-channels = <16>;
1081 compatible = "st,stm32mp1-adc-core";
1086 clock-names = "bus", "adc";
1087 interrupt-controller;
1089 #interrupt-cells = <1>;
1090 #address-cells = <1>;
1091 #size-cells = <0>;
1095 compatible = "st,stm32mp1-adc";
1096 #io-channel-cells = <1>;
1097 #address-cells = <1>;
1098 #size-cells = <0>;
1100 interrupt-parent = <&adc>;
1103 dma-names = "rx";
1108 compatible = "st,stm32mp1-adc";
1109 #io-channel-cells = <1>;
1110 #address-cells = <1>;
1111 #size-cells = <0>;
1113 interrupt-parent = <&adc>;
1116 dma-names = "rx";
1117 nvmem-cells = <&vrefint>;
1118 nvmem-cell-names = "vrefint";
1132 compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
1133 arm,primecell-periphid = <0x00253180>;
1137 clock-names = "apb_pclk";
1139 cap-sd-highspeed;
1140 cap-mmc-highspeed;
1141 max-frequency = <120000000>;
1145 usbotg_hs: usb-otg@49000000 {
1146 compatible = "st,stm32mp15-hsotg", "snps,dwc2";
1149 clock-names = "otg", "utmi";
1151 reset-names = "dwc2";
1153 g-rx-fifo-size = <512>;
1154 g-np-tx-fifo-size = <32>;
1155 g-tx-fifo-size = <256 16 16 16 16 16 16 16>;
1157 otg-rev = <0x200>;
1158 usb33d-supply = <&usb33>;
1163 compatible = "st,stm32mp1-ipcc";
1164 #mbox-cells = <1>;
1166 st,proc-id = <0>;
1167 interrupts-extended =
1170 interrupt-names = "rx", "tx";
1172 wakeup-source;
1177 compatible = "st,stm32-dcmi";
1182 clock-names = "mclk";
1184 dma-names = "tx";
1189 compatible = "st,stm32mp1-rcc", "syscon";
1191 #clock-cells = <1>;
1192 #reset-cells = <1>;
1196 compatible = "st,stm32mp1,pwr-reg";
1200 regulator-name = "reg11";
1201 regulator-min-microvolt = <1100000>;
1202 regulator-max-microvolt = <1100000>;
1206 regulator-name = "reg18";
1207 regulator-min-microvolt = <1800000>;
1208 regulator-max-microvolt = <1800000>;
1212 regulator-name = "usb33";
1213 regulator-min-microvolt = <3300000>;
1214 regulator-max-microvolt = <3300000>;
1219 compatible = "st,stm32mp151-pwr-mcu", "syscon";
1223 exti: interrupt-controller@5000d000 {
1224 compatible = "st,stm32mp1-exti", "syscon";
1225 interrupt-controller;
1226 #interrupt-cells = <2>;
1231 compatible = "st,stm32mp157-syscfg", "syscon";
1237 #address-cells = <1>;
1238 #size-cells = <0>;
1239 compatible = "st,stm32-lptimer";
1241 interrupts-extended = <&exti 48 IRQ_TYPE_LEVEL_HIGH>;
1243 clock-names = "mux";
1244 wakeup-source;
1247 pwm {
1248 compatible = "st,stm32-pwm-lp";
1249 #pwm-cells = <3>;
1254 compatible = "st,stm32-lptimer-trigger";
1260 compatible = "st,stm32-lptimer-counter";
1266 #address-cells = <1>;
1267 #size-cells = <0>;
1268 compatible = "st,stm32-lptimer";
1270 interrupts-extended = <&exti 50 IRQ_TYPE_LEVEL_HIGH>;
1272 clock-names = "mux";
1273 wakeup-source;
1276 pwm {
1277 compatible = "st,stm32-pwm-lp";
1278 #pwm-cells = <3>;
1283 compatible = "st,stm32-lptimer-trigger";
1290 compatible = "st,stm32-lptimer";
1292 interrupts-extended = <&exti 52 IRQ_TYPE_LEVEL_HIGH>;
1294 clock-names = "mux";
1295 wakeup-source;
1298 pwm {
1299 compatible = "st,stm32-pwm-lp";
1300 #pwm-cells = <3>;
1306 compatible = "st,stm32-lptimer";
1308 interrupts-extended = <&exti 53 IRQ_TYPE_LEVEL_HIGH>;
1310 clock-names = "mux";
1311 wakeup-source;
1314 pwm {
1315 compatible = "st,stm32-pwm-lp";
1316 #pwm-cells = <3>;
1322 compatible = "st,stm32-vrefbuf";
1324 regulator-min-microvolt = <1500000>;
1325 regulator-max-microvolt = <2500000>;
1331 compatible = "st,stm32h7-sai";
1332 #address-cells = <1>;
1333 #size-cells = <1>;
1340 sai4a: audio-controller@50027004 {
1341 #sound-dai-cells = <0>;
1342 compatible = "st,stm32-sai-sub-a";
1345 clock-names = "sai_ck";
1350 sai4b: audio-controller@50027024 {
1351 #sound-dai-cells = <0>;
1352 compatible = "st,stm32-sai-sub-b";
1355 clock-names = "sai_ck";
1362 compatible = "st,stm32-thermal";
1366 clock-names = "pclk";
1367 #thermal-sensor-cells = <0>;
1372 compatible = "st,stm32f756-hash";
1378 dma-names = "in";
1379 dma-maxburst = <2>;
1384 compatible = "st,stm32-rng";
1391 mdma1: dma-controller@58000000 {
1392 compatible = "st,stm32h7-mdma";
1397 #dma-cells = <5>;
1398 dma-channels = <32>;
1399 dma-requests = <48>;
1402 fmc: memory-controller@58002000 {
1403 #address-cells = <2>;
1404 #size-cells = <1>;
1405 compatible = "st,stm32mp1-fmc2-ebi";
1417 nand-controller@4,0 {
1418 #address-cells = <1>;
1419 #size-cells = <0>;
1420 compatible = "st,stm32mp1-fmc2-nfc";
1431 dma-names = "tx", "rx", "ecc";
1437 compatible = "st,stm32f469-qspi";
1439 reg-names = "qspi", "qspi_mm";
1443 dma-names = "tx", "rx";
1446 #address-cells = <1>;
1447 #size-cells = <0>;
1452 compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
1453 arm,primecell-periphid = <0x00253180>;
1457 clock-names = "apb_pclk";
1459 cap-sd-highspeed;
1460 cap-mmc-highspeed;
1461 max-frequency = <120000000>;
1466 compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
1467 arm,primecell-periphid = <0x00253180>;
1471 clock-names = "apb_pclk";
1473 cap-sd-highspeed;
1474 cap-mmc-highspeed;
1475 max-frequency = <120000000>;
1480 compatible = "st,stm32f7-crc";
1487 compatible = "st,stm32mp1-dwmac", "snps,dwmac-4.20a";
1489 reg-names = "stmmaceth";
1490 interrupts-extended = <&intc GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
1491 interrupt-names = "macirq";
1492 clock-names = "stmmaceth",
1493 "mac-clk-tx",
1494 "mac-clk-rx",
1495 "eth-ck",
1505 snps,mixed-burst;
1507 snps,en-tx-lpi-clockgating;
1508 snps,axi-config = <&stmmac_axi_config_0>;
1512 stmmac_axi_config_0: stmmac-axi-config {
1520 compatible = "generic-ohci";
1529 compatible = "generic-ehci";
1538 ltdc: display-controller@5a001000 {
1539 compatible = "st,stm32-ltdc";
1544 clock-names = "lcd";
1550 compatible = "st,stm32mp1-iwdg";
1553 clock-names = "pclk", "lsi";
1558 #address-cells = <1>;
1559 #size-cells = <0>;
1560 #clock-cells = <0>;
1561 compatible = "st,stm32mp1-usbphyc";
1565 vdda1v1-supply = <®11>;
1566 vdda1v8-supply = <®18>;
1569 usbphyc_port0: usb-phy@0 {
1570 #phy-cells = <0>;
1574 usbphyc_port1: usb-phy@1 {
1575 #phy-cells = <1>;
1581 compatible = "st,stm32h7-uart";
1583 interrupts-extended = <&exti 26 IRQ_TYPE_LEVEL_HIGH>;
1585 wakeup-source;
1590 #address-cells = <1>;
1591 #size-cells = <0>;
1592 compatible = "st,stm32h7-spi";
1599 dma-names = "rx", "tx";
1604 compatible = "st,stm32mp15-i2c";
1606 interrupt-names = "event", "error";
1611 #address-cells = <1>;
1612 #size-cells = <0>;
1613 st,syscfg-fmp = <&syscfg 0x4 0x8>;
1614 wakeup-source;
1615 i2c-analog-filter;
1620 compatible = "st,stm32mp1-rtc";
1623 clock-names = "pclk", "rtc_ck";
1624 interrupts-extended = <&exti 19 IRQ_TYPE_LEVEL_HIGH>;
1629 compatible = "st,stm32mp15-bsec";
1631 #address-cells = <1>;
1632 #size-cells = <1>;
1633 part_number_otp: part-number-otp@4 {
1636 vrefint: vrefin-cal@52 {
1648 compatible = "st,stm32mp15-i2c";
1650 interrupt-names = "event", "error";
1655 #address-cells = <1>;
1656 #size-cells = <0>;
1657 st,syscfg-fmp = <&syscfg 0x4 0x20>;
1658 wakeup-source;
1659 i2c-analog-filter;
1664 compatible = "st,stm32-tamp", "syscon", "simple-mfd";
1673 #address-cells = <1>;
1674 #size-cells = <1>;
1675 compatible = "st,stm32mp157-pinctrl";
1677 interrupt-parent = <&exti>;
1681 gpio-controller;
1682 #gpio-cells = <2>;
1683 interrupt-controller;
1684 #interrupt-cells = <2>;
1687 st,bank-name = "GPIOA";
1692 gpio-controller;
1693 #gpio-cells = <2>;
1694 interrupt-controller;
1695 #interrupt-cells = <2>;
1698 st,bank-name = "GPIOB";
1703 gpio-controller;
1704 #gpio-cells = <2>;
1705 interrupt-controller;
1706 #interrupt-cells = <2>;
1709 st,bank-name = "GPIOC";
1714 gpio-controller;
1715 #gpio-cells = <2>;
1716 interrupt-controller;
1717 #interrupt-cells = <2>;
1720 st,bank-name = "GPIOD";
1725 gpio-controller;
1726 #gpio-cells = <2>;
1727 interrupt-controller;
1728 #interrupt-cells = <2>;
1731 st,bank-name = "GPIOE";
1736 gpio-controller;
1737 #gpio-cells = <2>;
1738 interrupt-controller;
1739 #interrupt-cells = <2>;
1742 st,bank-name = "GPIOF";
1747 gpio-controller;
1748 #gpio-cells = <2>;
1749 interrupt-controller;
1750 #interrupt-cells = <2>;
1753 st,bank-name = "GPIOG";
1758 gpio-controller;
1759 #gpio-cells = <2>;
1760 interrupt-controller;
1761 #interrupt-cells = <2>;
1764 st,bank-name = "GPIOH";
1769 gpio-controller;
1770 #gpio-cells = <2>;
1771 interrupt-controller;
1772 #interrupt-cells = <2>;
1775 st,bank-name = "GPIOI";
1780 gpio-controller;
1781 #gpio-cells = <2>;
1782 interrupt-controller;
1783 #interrupt-cells = <2>;
1786 st,bank-name = "GPIOJ";
1791 gpio-controller;
1792 #gpio-cells = <2>;
1793 interrupt-controller;
1794 #interrupt-cells = <2>;
1797 st,bank-name = "GPIOK";
1803 #address-cells = <1>;
1804 #size-cells = <1>;
1805 compatible = "st,stm32mp157-z-pinctrl";
1807 interrupt-parent = <&exti>;
1811 gpio-controller;
1812 #gpio-cells = <2>;
1813 interrupt-controller;
1814 #interrupt-cells = <2>;
1817 st,bank-name = "GPIOZ";
1818 st,bank-ioport = <11>;
1825 compatible = "st,mlahb", "simple-bus";
1826 #address-cells = <1>;
1827 #size-cells = <1>;
1829 dma-ranges = <0x00000000 0x38000000 0x10000>,
1834 compatible = "st,stm32mp1-m4";
1839 reset-names = "mcu_rst";
1840 st,syscfg-holdboot = <&rcc 0x10C 0x1>;
1841 st,syscfg-pdds = <&pwr_mcu 0x0 0x1>;
1842 st,syscfg-rsc-tbl = <&tamp 0x144 0xFFFFFFFF>;
1843 st,syscfg-m4-state = <&tamp 0x148 0xFFFFFFFF>;