Lines Matching +full:- +full:pinmux
1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
9 adc1_ain_pins_a: adc1-ain-0 {
11 pinmux = <STM32_PINMUX('F', 11, ANALOG)>, /* ADC1_INP2 */
20 adc1_in6_pins_a: adc1-in6-0 {
22 pinmux = <STM32_PINMUX('F', 12, ANALOG)>;
26 adc12_ain_pins_a: adc12-ain-0 {
28 pinmux = <STM32_PINMUX('C', 3, ANALOG)>, /* ADC1 in13 */
35 adc12_ain_pins_b: adc12-ain-1 {
37 pinmux = <STM32_PINMUX('F', 12, ANALOG)>, /* ADC1 in6 */
42 adc12_usb_cc_pins_a: adc12-usb-cc-pins-0 {
44 pinmux = <STM32_PINMUX('A', 4, ANALOG)>, /* ADC12 in18 */
49 cec_pins_a: cec-0 {
51 pinmux = <STM32_PINMUX('A', 15, AF4)>;
52 bias-disable;
53 drive-open-drain;
54 slew-rate = <0>;
58 cec_sleep_pins_a: cec-sleep-0 {
60 pinmux = <STM32_PINMUX('A', 15, ANALOG)>; /* HDMI_CEC */
64 cec_pins_b: cec-1 {
66 pinmux = <STM32_PINMUX('B', 6, AF5)>;
67 bias-disable;
68 drive-open-drain;
69 slew-rate = <0>;
73 cec_sleep_pins_b: cec-sleep-1 {
75 pinmux = <STM32_PINMUX('B', 6, ANALOG)>; /* HDMI_CEC */
79 dac_ch1_pins_a: dac-ch1-0 {
81 pinmux = <STM32_PINMUX('A', 4, ANALOG)>;
85 dac_ch2_pins_a: dac-ch2-0 {
87 pinmux = <STM32_PINMUX('A', 5, ANALOG)>;
91 dcmi_pins_a: dcmi-0 {
93 pinmux = <STM32_PINMUX('H', 8, AF13)>,/* DCMI_HSYNC */
108 bias-disable;
112 dcmi_sleep_pins_a: dcmi-sleep-0 {
114 pinmux = <STM32_PINMUX('H', 8, ANALOG)>,/* DCMI_HSYNC */
132 dcmi_pins_b: dcmi-1 {
134 pinmux = <STM32_PINMUX('A', 4, AF13)>,/* DCMI_HSYNC */
145 bias-disable;
149 dcmi_sleep_pins_b: dcmi-sleep-1 {
151 pinmux = <STM32_PINMUX('A', 4, ANALOG)>,/* DCMI_HSYNC */
165 dcmi_pins_c: dcmi-2 {
167 pinmux = <STM32_PINMUX('A', 4, AF13)>,/* DCMI_HSYNC */
180 bias-pull-up;
184 dcmi_sleep_pins_c: dcmi-sleep-2 {
186 pinmux = <STM32_PINMUX('A', 4, ANALOG)>,/* DCMI_HSYNC */
202 ethernet0_rgmii_pins_a: rgmii-0 {
204 pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
212 bias-disable;
213 drive-push-pull;
214 slew-rate = <2>;
217 pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
218 bias-disable;
219 drive-push-pull;
220 slew-rate = <0>;
223 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
229 bias-disable;
233 ethernet0_rgmii_sleep_pins_a: rgmii-sleep-0 {
235 pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
253 ethernet0_rgmii_pins_b: rgmii-1 {
255 pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
263 bias-disable;
264 drive-push-pull;
265 slew-rate = <2>;
268 pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
269 bias-disable;
270 drive-push-pull;
271 slew-rate = <0>;
274 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
280 bias-disable;
284 ethernet0_rgmii_sleep_pins_b: rgmii-sleep-1 {
286 pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
304 ethernet0_rgmii_pins_c: rgmii-2 {
306 pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
314 bias-disable;
315 drive-push-pull;
316 slew-rate = <2>;
319 pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
320 bias-disable;
321 drive-push-pull;
322 slew-rate = <0>;
325 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
331 bias-disable;
335 ethernet0_rgmii_sleep_pins_c: rgmii-sleep-2 {
337 pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
355 ethernet0_rgmii_pins_d: rgmii-3 {
357 pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
364 bias-disable;
365 drive-push-pull;
366 slew-rate = <2>;
369 pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
370 bias-disable;
371 drive-push-pull;
372 slew-rate = <0>;
375 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
381 bias-disable;
385 ethernet0_rgmii_sleep_pins_d: rgmii-sleep-3 {
387 pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
405 ethernet0_rgmii_pins_e: rgmii-4 {
407 pinmux = <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
413 bias-disable;
414 drive-push-pull;
415 slew-rate = <2>;
418 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
424 bias-disable;
428 ethernet0_rgmii_sleep_pins_e: rgmii-sleep-4 {
430 pinmux = <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
445 ethernet0_rmii_pins_a: rmii-0 {
447 pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH1_RMII_TXD0 */
453 bias-disable;
454 drive-push-pull;
455 slew-rate = <2>;
458 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH1_RMII_RXD0 */
461 bias-disable;
465 ethernet0_rmii_sleep_pins_a: rmii-sleep-0 {
467 pinmux = <STM32_PINMUX('G', 13, ANALOG)>, /* ETH1_RMII_TXD0 */
479 ethernet0_rmii_pins_b: rmii-1 {
481 pinmux = <STM32_PINMUX('B', 5, AF0)>, /* ETH1_CLK */
485 bias-disable;
486 drive-push-pull;
487 slew-rate = <1>;
490 pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH1_MDIO */
491 bias-disable;
492 drive-push-pull;
493 slew-rate = <0>;
496 pinmux = <STM32_PINMUX('A', 7, AF11)>, /* ETH1_CRS_DV */
499 bias-disable;
502 pinmux = <STM32_PINMUX('B', 11, AF11)>; /* ETH1_TX_EN */
506 ethernet0_rmii_sleep_pins_b: rmii-sleep-1 {
508 pinmux = <STM32_PINMUX('A', 2, ANALOG)>, /* ETH1_MDIO */
520 ethernet0_rmii_pins_c: rmii-2 {
522 pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH1_RMII_TXD0 */
528 bias-disable;
529 drive-push-pull;
530 slew-rate = <2>;
533 pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH1_RMII_RXD0 */
536 bias-disable;
540 ethernet0_rmii_sleep_pins_c: rmii-sleep-2 {
542 pinmux = <STM32_PINMUX('G', 13, ANALOG)>, /* ETH1_RMII_TXD0 */
554 fmc_pins_a: fmc-0 {
556 pinmux = <STM32_PINMUX('D', 4, AF12)>, /* FMC_NOE */
569 bias-disable;
570 drive-push-pull;
571 slew-rate = <1>;
574 pinmux = <STM32_PINMUX('D', 6, AF12)>; /* FMC_NWAIT */
575 bias-pull-up;
579 fmc_sleep_pins_a: fmc-sleep-0 {
581 pinmux = <STM32_PINMUX('D', 4, ANALOG)>, /* FMC_NOE */
598 fmc_pins_b: fmc-1 {
600 pinmux = <STM32_PINMUX('D', 4, AF12)>, /* FMC_NOE */
621 bias-disable;
622 drive-push-pull;
623 slew-rate = <3>;
627 fmc_sleep_pins_b: fmc-sleep-1 {
629 pinmux = <STM32_PINMUX('D', 4, ANALOG)>, /* FMC_NOE */
653 i2c1_pins_a: i2c1-0 {
655 pinmux = <STM32_PINMUX('D', 12, AF5)>, /* I2C1_SCL */
657 bias-disable;
658 drive-open-drain;
659 slew-rate = <0>;
663 i2c1_sleep_pins_a: i2c1-sleep-0 {
665 pinmux = <STM32_PINMUX('D', 12, ANALOG)>, /* I2C1_SCL */
670 i2c1_pins_b: i2c1-1 {
672 pinmux = <STM32_PINMUX('F', 14, AF5)>, /* I2C1_SCL */
674 bias-disable;
675 drive-open-drain;
676 slew-rate = <0>;
680 i2c1_sleep_pins_b: i2c1-sleep-1 {
682 pinmux = <STM32_PINMUX('F', 14, ANALOG)>, /* I2C1_SCL */
687 i2c2_pins_a: i2c2-0 {
689 pinmux = <STM32_PINMUX('H', 4, AF4)>, /* I2C2_SCL */
691 bias-disable;
692 drive-open-drain;
693 slew-rate = <0>;
697 i2c2_sleep_pins_a: i2c2-sleep-0 {
699 pinmux = <STM32_PINMUX('H', 4, ANALOG)>, /* I2C2_SCL */
704 i2c2_pins_b1: i2c2-1 {
706 pinmux = <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
707 bias-disable;
708 drive-open-drain;
709 slew-rate = <0>;
713 i2c2_sleep_pins_b1: i2c2-sleep-1 {
715 pinmux = <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */
719 i2c2_pins_c: i2c2-2 {
721 pinmux = <STM32_PINMUX('F', 1, AF4)>, /* I2C2_SCL */
723 bias-disable;
724 drive-open-drain;
725 slew-rate = <0>;
729 i2c2_pins_sleep_c: i2c2-sleep-2 {
731 pinmux = <STM32_PINMUX('F', 1, ANALOG)>, /* I2C2_SCL */
736 i2c5_pins_a: i2c5-0 {
738 pinmux = <STM32_PINMUX('A', 11, AF4)>, /* I2C5_SCL */
740 bias-disable;
741 drive-open-drain;
742 slew-rate = <0>;
746 i2c5_sleep_pins_a: i2c5-sleep-0 {
748 pinmux = <STM32_PINMUX('A', 11, ANALOG)>, /* I2C5_SCL */
754 i2c5_pins_b: i2c5-1 {
756 pinmux = <STM32_PINMUX('D', 0, AF4)>, /* I2C5_SCL */
758 bias-disable;
759 drive-open-drain;
760 slew-rate = <0>;
764 i2c5_sleep_pins_b: i2c5-sleep-1 {
766 pinmux = <STM32_PINMUX('D', 0, ANALOG)>, /* I2C5_SCL */
771 i2s2_pins_a: i2s2-0 {
773 pinmux = <STM32_PINMUX('I', 3, AF5)>, /* I2S2_SDO */
776 slew-rate = <1>;
777 drive-push-pull;
778 bias-disable;
782 i2s2_sleep_pins_a: i2s2-sleep-0 {
784 pinmux = <STM32_PINMUX('I', 3, ANALOG)>, /* I2S2_SDO */
790 ltdc_pins_a: ltdc-0 {
792 pinmux = <STM32_PINMUX('G', 7, AF14)>, /* LCD_CLK */
820 bias-disable;
821 drive-push-pull;
822 slew-rate = <1>;
826 ltdc_sleep_pins_a: ltdc-sleep-0 {
828 pinmux = <STM32_PINMUX('G', 7, ANALOG)>, /* LCD_CLK */
859 ltdc_pins_b: ltdc-1 {
861 pinmux = <STM32_PINMUX('I', 14, AF14)>, /* LCD_CLK */
889 bias-disable;
890 drive-push-pull;
891 slew-rate = <1>;
895 ltdc_sleep_pins_b: ltdc-sleep-1 {
897 pinmux = <STM32_PINMUX('I', 14, ANALOG)>, /* LCD_CLK */
928 ltdc_pins_c: ltdc-2 {
930 pinmux = <STM32_PINMUX('B', 1, AF9)>, /* LTDC_R6 */
951 bias-disable;
952 drive-push-pull;
953 slew-rate = <0>;
956 pinmux = <STM32_PINMUX('E', 14, AF14)>; /* LTDC_CLK */
957 bias-disable;
958 drive-push-pull;
959 slew-rate = <1>;
963 ltdc_sleep_pins_c: ltdc-sleep-2 {
965 pinmux = <STM32_PINMUX('B', 1, ANALOG)>, /* LTDC_R6 */
990 ltdc_pins_d: ltdc-3 {
992 pinmux = <STM32_PINMUX('G', 7, AF14)>; /* LCD_CLK */
993 bias-disable;
994 drive-push-pull;
995 slew-rate = <3>;
998 pinmux = <STM32_PINMUX('I', 10, AF14)>, /* LCD_HSYNC */
1025 bias-disable;
1026 drive-push-pull;
1027 slew-rate = <2>;
1031 ltdc_sleep_pins_d: ltdc-sleep-3 {
1033 pinmux = <STM32_PINMUX('G', 7, ANALOG)>, /* LCD_CLK */
1064 mco1_pins_a: mco1-0 {
1066 pinmux = <STM32_PINMUX('A', 13, AF2)>; /* MCO1 */
1067 bias-disable;
1068 drive-push-pull;
1069 slew-rate = <1>;
1073 mco1_sleep_pins_a: mco1-sleep-0 {
1075 pinmux = <STM32_PINMUX('A', 13, ANALOG)>; /* MCO1 */
1079 mco2_pins_a: mco2-0 {
1081 pinmux = <STM32_PINMUX('G', 2, AF1)>; /* MCO2 */
1082 bias-disable;
1083 drive-push-pull;
1084 slew-rate = <2>;
1088 mco2_sleep_pins_a: mco2-sleep-0 {
1090 pinmux = <STM32_PINMUX('G', 2, ANALOG)>; /* MCO2 */
1094 m_can1_pins_a: m-can1-0 {
1096 pinmux = <STM32_PINMUX('H', 13, AF9)>; /* CAN1_TX */
1097 slew-rate = <1>;
1098 drive-push-pull;
1099 bias-disable;
1102 pinmux = <STM32_PINMUX('I', 9, AF9)>; /* CAN1_RX */
1103 bias-disable;
1107 m_can1_sleep_pins_a: m_can1-sleep-0 {
1109 pinmux = <STM32_PINMUX('H', 13, ANALOG)>, /* CAN1_TX */
1114 m_can1_pins_b: m-can1-1 {
1116 pinmux = <STM32_PINMUX('A', 12, AF9)>; /* CAN1_TX */
1117 slew-rate = <1>;
1118 drive-push-pull;
1119 bias-disable;
1122 pinmux = <STM32_PINMUX('A', 11, AF9)>; /* CAN1_RX */
1123 bias-disable;
1127 m_can1_sleep_pins_b: m_can1-sleep-1 {
1129 pinmux = <STM32_PINMUX('A', 12, ANALOG)>, /* CAN1_TX */
1134 m_can1_pins_c: m-can1-2 {
1136 pinmux = <STM32_PINMUX('H', 13, AF9)>; /* CAN1_TX */
1137 slew-rate = <1>;
1138 drive-push-pull;
1139 bias-disable;
1142 pinmux = <STM32_PINMUX('H', 14, AF9)>; /* CAN1_RX */
1143 bias-disable;
1147 m_can1_sleep_pins_c: m_can1-sleep-2 {
1149 pinmux = <STM32_PINMUX('H', 13, ANALOG)>, /* CAN1_TX */
1154 m_can2_pins_a: m-can2-0 {
1156 pinmux = <STM32_PINMUX('B', 13, AF9)>; /* CAN2_TX */
1157 slew-rate = <1>;
1158 drive-push-pull;
1159 bias-disable;
1162 pinmux = <STM32_PINMUX('B', 5, AF9)>; /* CAN2_RX */
1163 bias-disable;
1167 m_can2_sleep_pins_a: m_can2-sleep-0 {
1169 pinmux = <STM32_PINMUX('B', 13, ANALOG)>, /* CAN2_TX */
1174 pwm1_pins_a: pwm1-0 {
1176 pinmux = <STM32_PINMUX('E', 9, AF1)>, /* TIM1_CH1 */
1179 bias-pull-down;
1180 drive-push-pull;
1181 slew-rate = <0>;
1185 pwm1_sleep_pins_a: pwm1-sleep-0 {
1187 pinmux = <STM32_PINMUX('E', 9, ANALOG)>, /* TIM1_CH1 */
1193 pwm1_pins_b: pwm1-1 {
1195 pinmux = <STM32_PINMUX('E', 9, AF1)>; /* TIM1_CH1 */
1196 bias-pull-down;
1197 drive-push-pull;
1198 slew-rate = <0>;
1202 pwm1_sleep_pins_b: pwm1-sleep-1 {
1204 pinmux = <STM32_PINMUX('E', 9, ANALOG)>; /* TIM1_CH1 */
1208 pwm1_pins_c: pwm1-2 {
1210 pinmux = <STM32_PINMUX('E', 11, AF1)>; /* TIM1_CH2 */
1211 drive-push-pull;
1212 slew-rate = <0>;
1216 pwm1_sleep_pins_c: pwm1-sleep-2 {
1218 pinmux = <STM32_PINMUX('E', 11, ANALOG)>; /* TIM1_CH2 */
1222 pwm2_pins_a: pwm2-0 {
1224 pinmux = <STM32_PINMUX('A', 3, AF1)>; /* TIM2_CH4 */
1225 bias-pull-down;
1226 drive-push-pull;
1227 slew-rate = <0>;
1231 pwm2_sleep_pins_a: pwm2-sleep-0 {
1233 pinmux = <STM32_PINMUX('A', 3, ANALOG)>; /* TIM2_CH4 */
1237 pwm3_pins_a: pwm3-0 {
1239 pinmux = <STM32_PINMUX('C', 7, AF2)>; /* TIM3_CH2 */
1240 bias-pull-down;
1241 drive-push-pull;
1242 slew-rate = <0>;
1246 pwm3_sleep_pins_a: pwm3-sleep-0 {
1248 pinmux = <STM32_PINMUX('C', 7, ANALOG)>; /* TIM3_CH2 */
1252 pwm3_pins_b: pwm3-1 {
1254 pinmux = <STM32_PINMUX('B', 5, AF2)>; /* TIM3_CH2 */
1255 bias-disable;
1256 drive-push-pull;
1257 slew-rate = <0>;
1261 pwm3_sleep_pins_b: pwm3-sleep-1 {
1263 pinmux = <STM32_PINMUX('B', 5, ANALOG)>; /* TIM3_CH2 */
1267 pwm4_pins_a: pwm4-0 {
1269 pinmux = <STM32_PINMUX('D', 14, AF2)>, /* TIM4_CH3 */
1271 bias-pull-down;
1272 drive-push-pull;
1273 slew-rate = <0>;
1277 pwm4_sleep_pins_a: pwm4-sleep-0 {
1279 pinmux = <STM32_PINMUX('D', 14, ANALOG)>, /* TIM4_CH3 */
1284 pwm4_pins_b: pwm4-1 {
1286 pinmux = <STM32_PINMUX('D', 13, AF2)>; /* TIM4_CH2 */
1287 bias-pull-down;
1288 drive-push-pull;
1289 slew-rate = <0>;
1293 pwm4_sleep_pins_b: pwm4-sleep-1 {
1295 pinmux = <STM32_PINMUX('D', 13, ANALOG)>; /* TIM4_CH2 */
1299 pwm5_pins_a: pwm5-0 {
1301 pinmux = <STM32_PINMUX('H', 11, AF2)>; /* TIM5_CH2 */
1302 bias-pull-down;
1303 drive-push-pull;
1304 slew-rate = <0>;
1308 pwm5_sleep_pins_a: pwm5-sleep-0 {
1310 pinmux = <STM32_PINMUX('H', 11, ANALOG)>; /* TIM5_CH2 */
1314 pwm5_pins_b: pwm5-1 {
1316 pinmux = <STM32_PINMUX('H', 11, AF2)>, /* TIM5_CH2 */
1319 bias-disable;
1320 drive-push-pull;
1321 slew-rate = <0>;
1325 pwm5_sleep_pins_b: pwm5-sleep-1 {
1327 pinmux = <STM32_PINMUX('H', 11, ANALOG)>, /* TIM5_CH2 */
1333 pwm8_pins_a: pwm8-0 {
1335 pinmux = <STM32_PINMUX('I', 2, AF3)>; /* TIM8_CH4 */
1336 bias-pull-down;
1337 drive-push-pull;
1338 slew-rate = <0>;
1342 pwm8_sleep_pins_a: pwm8-sleep-0 {
1344 pinmux = <STM32_PINMUX('I', 2, ANALOG)>; /* TIM8_CH4 */
1348 pwm8_pins_b: pwm8-1 {
1350 pinmux = <STM32_PINMUX('I', 5, AF3)>, /* TIM8_CH1 */
1354 drive-push-pull;
1355 slew-rate = <0>;
1359 pwm8_sleep_pins_b: pwm8-sleep-1 {
1361 pinmux = <STM32_PINMUX('I', 5, ANALOG)>, /* TIM8_CH1 */
1368 pwm12_pins_a: pwm12-0 {
1370 pinmux = <STM32_PINMUX('H', 6, AF2)>; /* TIM12_CH1 */
1371 bias-pull-down;
1372 drive-push-pull;
1373 slew-rate = <0>;
1377 pwm12_sleep_pins_a: pwm12-sleep-0 {
1379 pinmux = <STM32_PINMUX('H', 6, ANALOG)>; /* TIM12_CH1 */
1383 qspi_clk_pins_a: qspi-clk-0 {
1385 pinmux = <STM32_PINMUX('F', 10, AF9)>; /* QSPI_CLK */
1386 bias-disable;
1387 drive-push-pull;
1388 slew-rate = <3>;
1392 qspi_clk_sleep_pins_a: qspi-clk-sleep-0 {
1394 pinmux = <STM32_PINMUX('F', 10, ANALOG)>; /* QSPI_CLK */
1398 qspi_bk1_pins_a: qspi-bk1-0 {
1400 pinmux = <STM32_PINMUX('F', 8, AF10)>, /* QSPI_BK1_IO0 */
1404 bias-disable;
1405 drive-push-pull;
1406 slew-rate = <1>;
1410 qspi_bk1_sleep_pins_a: qspi-bk1-sleep-0 {
1412 pinmux = <STM32_PINMUX('F', 8, ANALOG)>, /* QSPI_BK1_IO0 */
1419 qspi_bk2_pins_a: qspi-bk2-0 {
1421 pinmux = <STM32_PINMUX('H', 2, AF9)>, /* QSPI_BK2_IO0 */
1425 bias-disable;
1426 drive-push-pull;
1427 slew-rate = <1>;
1431 qspi_bk2_sleep_pins_a: qspi-bk2-sleep-0 {
1433 pinmux = <STM32_PINMUX('H', 2, ANALOG)>, /* QSPI_BK2_IO0 */
1440 qspi_cs1_pins_a: qspi-cs1-0 {
1442 pinmux = <STM32_PINMUX('B', 6, AF10)>; /* QSPI_BK1_NCS */
1443 bias-pull-up;
1444 drive-push-pull;
1445 slew-rate = <1>;
1449 qspi_cs1_sleep_pins_a: qspi-cs1-sleep-0 {
1451 pinmux = <STM32_PINMUX('B', 6, ANALOG)>; /* QSPI_BK1_NCS */
1455 qspi_cs2_pins_a: qspi-cs2-0 {
1457 pinmux = <STM32_PINMUX('C', 0, AF10)>; /* QSPI_BK2_NCS */
1458 bias-pull-up;
1459 drive-push-pull;
1460 slew-rate = <1>;
1464 qspi_cs2_sleep_pins_a: qspi-cs2-sleep-0 {
1466 pinmux = <STM32_PINMUX('C', 0, ANALOG)>; /* QSPI_BK2_NCS */
1470 sai2a_pins_a: sai2a-0 {
1472 pinmux = <STM32_PINMUX('I', 5, AF10)>, /* SAI2_SCK_A */
1476 slew-rate = <0>;
1477 drive-push-pull;
1478 bias-disable;
1482 sai2a_sleep_pins_a: sai2a-sleep-0 {
1484 pinmux = <STM32_PINMUX('I', 5, ANALOG)>, /* SAI2_SCK_A */
1491 sai2a_pins_b: sai2a-1 {
1493 pinmux = <STM32_PINMUX('I', 6, AF10)>, /* SAI2_SD_A */
1496 slew-rate = <0>;
1497 drive-push-pull;
1498 bias-disable;
1502 sai2a_sleep_pins_b: sai2a-sleep-1 {
1504 pinmux = <STM32_PINMUX('I', 6, ANALOG)>, /* SAI2_SD_A */
1510 sai2a_pins_c: sai2a-2 {
1512 pinmux = <STM32_PINMUX('D', 13, AF10)>, /* SAI2_SCK_A */
1515 slew-rate = <0>;
1516 drive-push-pull;
1517 bias-disable;
1521 sai2a_sleep_pins_c: sai2a-sleep-2 {
1523 pinmux = <STM32_PINMUX('D', 13, ANALOG)>, /* SAI2_SCK_A */
1529 sai2b_pins_a: sai2b-0 {
1531 pinmux = <STM32_PINMUX('E', 12, AF10)>, /* SAI2_SCK_B */
1534 slew-rate = <0>;
1535 drive-push-pull;
1536 bias-disable;
1539 pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
1540 bias-disable;
1544 sai2b_sleep_pins_a: sai2b-sleep-0 {
1546 pinmux = <STM32_PINMUX('F', 11, ANALOG)>, /* SAI2_SD_B */
1553 sai2b_pins_b: sai2b-1 {
1555 pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
1556 bias-disable;
1560 sai2b_sleep_pins_b: sai2b-sleep-1 {
1562 pinmux = <STM32_PINMUX('F', 11, ANALOG)>; /* SAI2_SD_B */
1566 sai2b_pins_c: sai2b-2 {
1568 pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
1569 bias-disable;
1573 sai2b_sleep_pins_c: sai2b-sleep-2 {
1575 pinmux = <STM32_PINMUX('F', 11, ANALOG)>; /* SAI2_SD_B */
1579 sai2b_pins_d: sai2b-3 {
1581 pinmux = <STM32_PINMUX('H', 2, AF10)>, /* SAI2_SCK_B */
1584 slew-rate = <0>;
1585 drive-push-pull;
1586 bias-disable;
1589 pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
1590 bias-disable;
1594 sai2b_sleep_pins_d: sai2b-sleep-3 {
1596 pinmux = <STM32_PINMUX('H', 2, ANALOG)>, /* SAI2_SCK_B */
1603 sai4a_pins_a: sai4a-0 {
1605 pinmux = <STM32_PINMUX('B', 5, AF10)>; /* SAI4_SD_A */
1606 slew-rate = <0>;
1607 drive-push-pull;
1608 bias-disable;
1612 sai4a_sleep_pins_a: sai4a-sleep-0 {
1614 pinmux = <STM32_PINMUX('B', 5, ANALOG)>; /* SAI4_SD_A */
1618 sdmmc1_b4_pins_a: sdmmc1-b4-0 {
1620 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
1625 slew-rate = <1>;
1626 drive-push-pull;
1627 bias-disable;
1630 pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
1631 slew-rate = <2>;
1632 drive-push-pull;
1633 bias-disable;
1637 sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 {
1639 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
1643 slew-rate = <1>;
1644 drive-push-pull;
1645 bias-disable;
1648 pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
1649 slew-rate = <2>;
1650 drive-push-pull;
1651 bias-disable;
1654 pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
1655 slew-rate = <1>;
1656 drive-open-drain;
1657 bias-disable;
1661 sdmmc1_b4_init_pins_a: sdmmc1-b4-init-0 {
1663 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
1667 slew-rate = <1>;
1668 drive-push-pull;
1669 bias-disable;
1673 sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 {
1675 pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */
1684 sdmmc1_b4_pins_b: sdmmc1-b4-1 {
1686 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
1691 slew-rate = <1>;
1692 drive-push-pull;
1693 bias-disable;
1696 pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
1697 slew-rate = <2>;
1698 drive-push-pull;
1699 bias-disable;
1703 sdmmc1_b4_od_pins_b: sdmmc1-b4-od-1 {
1705 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
1709 slew-rate = <1>;
1710 drive-push-pull;
1711 bias-disable;
1714 pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
1715 slew-rate = <2>;
1716 drive-push-pull;
1717 bias-disable;
1720 pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
1721 slew-rate = <1>;
1722 drive-open-drain;
1723 bias-disable;
1727 sdmmc1_b4_sleep_pins_b: sdmmc1-b4-sleep-1 {
1729 pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */
1738 sdmmc1_dir_pins_a: sdmmc1-dir-0 {
1740 pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
1743 slew-rate = <1>;
1744 drive-push-pull;
1745 bias-pull-up;
1748 pinmux = <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */
1749 bias-pull-up;
1753 sdmmc1_dir_init_pins_a: sdmmc1-dir-init-0 {
1755 pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
1758 slew-rate = <1>;
1759 drive-push-pull;
1760 bias-pull-up;
1764 sdmmc1_dir_sleep_pins_a: sdmmc1-dir-sleep-0 {
1766 pinmux = <STM32_PINMUX('F', 2, ANALOG)>, /* SDMMC1_D0DIR */
1773 sdmmc1_dir_pins_b: sdmmc1-dir-1 {
1775 pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
1778 slew-rate = <1>;
1779 drive-push-pull;
1780 bias-pull-up;
1783 pinmux = <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */
1784 bias-pull-up;
1788 sdmmc1_dir_sleep_pins_b: sdmmc1-dir-sleep-1 {
1790 pinmux = <STM32_PINMUX('F', 2, ANALOG)>, /* SDMMC1_D0DIR */
1797 sdmmc2_b4_pins_a: sdmmc2-b4-0 {
1799 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
1804 slew-rate = <1>;
1805 drive-push-pull;
1806 bias-pull-up;
1809 pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
1810 slew-rate = <2>;
1811 drive-push-pull;
1812 bias-pull-up;
1816 sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 {
1818 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
1822 slew-rate = <1>;
1823 drive-push-pull;
1824 bias-pull-up;
1827 pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
1828 slew-rate = <2>;
1829 drive-push-pull;
1830 bias-pull-up;
1833 pinmux = <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
1834 slew-rate = <1>;
1835 drive-open-drain;
1836 bias-pull-up;
1840 sdmmc2_b4_sleep_pins_a: sdmmc2-b4-sleep-0 {
1842 pinmux = <STM32_PINMUX('B', 14, ANALOG)>, /* SDMMC2_D0 */
1851 sdmmc2_b4_pins_b: sdmmc2-b4-1 {
1853 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
1858 slew-rate = <1>;
1859 drive-push-pull;
1860 bias-disable;
1863 pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
1864 slew-rate = <2>;
1865 drive-push-pull;
1866 bias-disable;
1870 sdmmc2_b4_od_pins_b: sdmmc2-b4-od-1 {
1872 pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
1876 slew-rate = <1>;
1877 drive-push-pull;
1878 bias-disable;
1881 pinmux = <STM32_PINMUX('E', 3, AF9)>; /* SDMMC2_CK */
1882 slew-rate = <2>;
1883 drive-push-pull;
1884 bias-disable;
1887 pinmux = <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
1888 slew-rate = <1>;
1889 drive-open-drain;
1890 bias-disable;
1894 sdmmc2_d47_pins_a: sdmmc2-d47-0 {
1896 pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
1900 slew-rate = <1>;
1901 drive-push-pull;
1902 bias-pull-up;
1906 sdmmc2_d47_sleep_pins_a: sdmmc2-d47-sleep-0 {
1908 pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
1915 sdmmc2_d47_pins_b: sdmmc2-d47-1 {
1917 pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
1921 slew-rate = <1>;
1922 drive-push-pull;
1923 bias-disable;
1927 sdmmc2_d47_sleep_pins_b: sdmmc2-d47-sleep-1 {
1929 pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
1936 sdmmc2_d47_pins_c: sdmmc2-d47-2 {
1938 pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
1942 slew-rate = <1>;
1943 drive-push-pull;
1944 bias-pull-up;
1948 sdmmc2_d47_sleep_pins_c: sdmmc2-d47-sleep-2 {
1950 pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
1957 sdmmc2_d47_pins_d: sdmmc2-d47-3 {
1959 pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
1966 sdmmc2_d47_sleep_pins_d: sdmmc2-d47-sleep-3 {
1968 pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
1975 sdmmc2_d47_pins_e: sdmmc2-d47-4 {
1977 pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
1981 slew-rate = <1>;
1982 drive-push-pull;
1983 bias-pull-up;
1987 sdmmc2_d47_sleep_pins_e: sdmmc2-d47-sleep-4 {
1989 pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
1996 sdmmc3_b4_pins_a: sdmmc3-b4-0 {
1998 pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
2003 slew-rate = <1>;
2004 drive-push-pull;
2005 bias-pull-up;
2008 pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
2009 slew-rate = <2>;
2010 drive-push-pull;
2011 bias-pull-up;
2015 sdmmc3_b4_od_pins_a: sdmmc3-b4-od-0 {
2017 pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
2021 slew-rate = <1>;
2022 drive-push-pull;
2023 bias-pull-up;
2026 pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
2027 slew-rate = <2>;
2028 drive-push-pull;
2029 bias-pull-up;
2032 pinmux = <STM32_PINMUX('F', 1, AF9)>; /* SDMMC2_CMD */
2033 slew-rate = <1>;
2034 drive-open-drain;
2035 bias-pull-up;
2039 sdmmc3_b4_sleep_pins_a: sdmmc3-b4-sleep-0 {
2041 pinmux = <STM32_PINMUX('F', 0, ANALOG)>, /* SDMMC3_D0 */
2050 sdmmc3_b4_pins_b: sdmmc3-b4-1 {
2052 pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
2057 slew-rate = <1>;
2058 drive-push-pull;
2059 bias-pull-up;
2062 pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
2063 slew-rate = <2>;
2064 drive-push-pull;
2065 bias-pull-up;
2069 sdmmc3_b4_od_pins_b: sdmmc3-b4-od-1 {
2071 pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
2075 slew-rate = <1>;
2076 drive-push-pull;
2077 bias-pull-up;
2080 pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
2081 slew-rate = <2>;
2082 drive-push-pull;
2083 bias-pull-up;
2086 pinmux = <STM32_PINMUX('D', 0, AF10)>; /* SDMMC2_CMD */
2087 slew-rate = <1>;
2088 drive-open-drain;
2089 bias-pull-up;
2093 sdmmc3_b4_sleep_pins_b: sdmmc3-b4-sleep-1 {
2095 pinmux = <STM32_PINMUX('F', 0, ANALOG)>, /* SDMMC3_D0 */
2104 spdifrx_pins_a: spdifrx-0 {
2106 pinmux = <STM32_PINMUX('G', 12, AF8)>; /* SPDIF_IN1 */
2107 bias-disable;
2111 spdifrx_sleep_pins_a: spdifrx-sleep-0 {
2113 pinmux = <STM32_PINMUX('G', 12, ANALOG)>; /* SPDIF_IN1 */
2117 spi1_pins_b: spi1-1 {
2119 pinmux = <STM32_PINMUX('A', 5, AF5)>, /* SPI1_SCK */
2121 bias-disable;
2122 drive-push-pull;
2123 slew-rate = <1>;
2127 pinmux = <STM32_PINMUX('A', 6, AF5)>; /* SPI1_MISO */
2128 bias-disable;
2132 spi2_pins_a: spi2-0 {
2134 pinmux = <STM32_PINMUX('B', 10, AF5)>, /* SPI2_SCK */
2136 bias-disable;
2137 drive-push-pull;
2138 slew-rate = <1>;
2142 pinmux = <STM32_PINMUX('I', 2, AF5)>; /* SPI2_MISO */
2143 bias-disable;
2147 spi2_pins_b: spi2-1 {
2149 pinmux = <STM32_PINMUX('I', 1, AF5)>, /* SPI2_SCK */
2151 bias-disable;
2152 drive-push-pull;
2153 slew-rate = <1>;
2157 pinmux = <STM32_PINMUX('I', 2, AF5)>; /* SPI2_MISO */
2158 bias-disable;
2162 spi2_pins_c: spi2-2 {
2164 pinmux = <STM32_PINMUX('I', 1, AF5)>, /* SPI2_SCK */
2166 bias-disable;
2167 drive-push-pull;
2171 pinmux = <STM32_PINMUX('I', 2, AF5)>; /* SPI2_MISO */
2172 bias-pull-down;
2176 spi4_pins_a: spi4-0 {
2178 pinmux = <STM32_PINMUX('E', 12, AF5)>, /* SPI4_SCK */
2180 bias-disable;
2181 drive-push-pull;
2182 slew-rate = <1>;
2185 pinmux = <STM32_PINMUX('E', 13, AF5)>; /* SPI4_MISO */
2186 bias-disable;
2190 spi5_pins_a: spi5-0 {
2192 pinmux = <STM32_PINMUX('F', 7, AF5)>, /* SPI5_SCK */
2194 bias-disable;
2195 drive-push-pull;
2196 slew-rate = <1>;
2200 pinmux = <STM32_PINMUX('F', 8, AF5)>; /* SPI5_MISO */
2201 bias-disable;
2205 stusb1600_pins_a: stusb1600-0 {
2207 pinmux = <STM32_PINMUX('I', 11, GPIO)>;
2208 bias-pull-up;
2212 uart4_pins_a: uart4-0 {
2214 pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
2215 bias-disable;
2216 drive-push-pull;
2217 slew-rate = <0>;
2220 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
2221 bias-disable;
2225 uart4_idle_pins_a: uart4-idle-0 {
2227 pinmux = <STM32_PINMUX('G', 11, ANALOG)>; /* UART4_TX */
2230 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
2231 bias-disable;
2235 uart4_sleep_pins_a: uart4-sleep-0 {
2237 pinmux = <STM32_PINMUX('G', 11, ANALOG)>, /* UART4_TX */
2242 uart4_pins_b: uart4-1 {
2244 pinmux = <STM32_PINMUX('D', 1, AF8)>; /* UART4_TX */
2245 bias-disable;
2246 drive-push-pull;
2247 slew-rate = <0>;
2250 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
2251 bias-disable;
2255 uart4_pins_c: uart4-2 {
2257 pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
2258 bias-disable;
2259 drive-push-pull;
2260 slew-rate = <0>;
2263 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
2264 bias-disable;
2268 uart4_pins_d: uart4-3 {
2270 pinmux = <STM32_PINMUX('A', 13, AF8)>; /* UART4_TX */
2271 bias-disable;
2272 drive-push-pull;
2273 slew-rate = <0>;
2276 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
2277 bias-disable;
2281 uart4_idle_pins_d: uart4-idle-3 {
2283 pinmux = <STM32_PINMUX('A', 13, ANALOG)>; /* UART4_TX */
2286 pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
2287 bias-disable;
2291 uart4_sleep_pins_d: uart4-sleep-3 {
2293 pinmux = <STM32_PINMUX('A', 13, ANALOG)>, /* UART4_TX */
2298 uart5_pins_a: uart5-0 {
2300 pinmux = <STM32_PINMUX('B', 13, AF14)>; /* UART5_TX */
2301 bias-disable;
2302 drive-push-pull;
2303 slew-rate = <0>;
2306 pinmux = <STM32_PINMUX('B', 5, AF12)>; /* UART5_RX */
2307 bias-disable;
2311 uart7_pins_a: uart7-0 {
2313 pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART7_TX */
2314 bias-disable;
2315 drive-push-pull;
2316 slew-rate = <0>;
2319 pinmux = <STM32_PINMUX('E', 7, AF7)>, /* UART7_RX */
2322 bias-disable;
2326 uart7_pins_b: uart7-1 {
2328 pinmux = <STM32_PINMUX('F', 7, AF7)>; /* UART7_TX */
2329 bias-disable;
2330 drive-push-pull;
2331 slew-rate = <0>;
2334 pinmux = <STM32_PINMUX('F', 6, AF7)>; /* UART7_RX */
2335 bias-disable;
2339 uart7_pins_c: uart7-2 {
2341 pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART7_TX */
2342 bias-disable;
2343 drive-push-pull;
2344 slew-rate = <0>;
2347 pinmux = <STM32_PINMUX('E', 7, AF7)>; /* UART7_RX */
2348 bias-pull-up;
2352 uart7_idle_pins_c: uart7-idle-2 {
2354 pinmux = <STM32_PINMUX('E', 8, ANALOG)>; /* UART7_TX */
2357 pinmux = <STM32_PINMUX('E', 7, AF7)>; /* UART7_RX */
2358 bias-pull-up;
2362 uart7_sleep_pins_c: uart7-sleep-2 {
2364 pinmux = <STM32_PINMUX('E', 8, ANALOG)>, /* UART7_TX */
2369 uart8_pins_a: uart8-0 {
2371 pinmux = <STM32_PINMUX('E', 1, AF8)>; /* UART8_TX */
2372 bias-disable;
2373 drive-push-pull;
2374 slew-rate = <0>;
2377 pinmux = <STM32_PINMUX('E', 0, AF8)>; /* UART8_RX */
2378 bias-disable;
2382 uart8_rtscts_pins_a: uart8rtscts-0 {
2384 pinmux = <STM32_PINMUX('G', 7, AF8)>, /* UART8_RTS */
2386 bias-disable;
2390 usart1_pins_a: usart1-0 {
2392 pinmux = <STM32_PINMUX('A', 12, AF7)>; /* USART1_RTS */
2393 bias-disable;
2394 drive-push-pull;
2395 slew-rate = <0>;
2398 pinmux = <STM32_PINMUX('A', 11, AF7)>; /* USART1_CTS_NSS */
2399 bias-disable;
2403 usart1_idle_pins_a: usart1-idle-0 {
2405 pinmux = <STM32_PINMUX('A', 12, ANALOG)>, /* USART1_RTS */
2410 usart1_sleep_pins_a: usart1-sleep-0 {
2412 pinmux = <STM32_PINMUX('A', 12, ANALOG)>, /* USART1_RTS */
2417 usart2_pins_a: usart2-0 {
2419 pinmux = <STM32_PINMUX('F', 5, AF7)>, /* USART2_TX */
2421 bias-disable;
2422 drive-push-pull;
2423 slew-rate = <0>;
2426 pinmux = <STM32_PINMUX('D', 6, AF7)>, /* USART2_RX */
2428 bias-disable;
2432 usart2_sleep_pins_a: usart2-sleep-0 {
2434 pinmux = <STM32_PINMUX('F', 5, ANALOG)>, /* USART2_TX */
2441 usart2_pins_b: usart2-1 {
2443 pinmux = <STM32_PINMUX('F', 5, AF7)>, /* USART2_TX */
2445 bias-disable;
2446 drive-push-pull;
2447 slew-rate = <0>;
2450 pinmux = <STM32_PINMUX('F', 4, AF7)>, /* USART2_RX */
2452 bias-disable;
2456 usart2_sleep_pins_b: usart2-sleep-1 {
2458 pinmux = <STM32_PINMUX('F', 5, ANALOG)>, /* USART2_TX */
2465 usart2_pins_c: usart2-2 {
2467 pinmux = <STM32_PINMUX('D', 5, AF7)>, /* USART2_TX */
2469 bias-disable;
2470 drive-push-pull;
2471 slew-rate = <0>;
2474 pinmux = <STM32_PINMUX('D', 6, AF7)>, /* USART2_RX */
2476 bias-disable;
2480 usart2_idle_pins_c: usart2-idle-2 {
2482 pinmux = <STM32_PINMUX('D', 5, ANALOG)>, /* USART2_TX */
2486 pinmux = <STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */
2487 bias-disable;
2488 drive-push-pull;
2489 slew-rate = <0>;
2492 pinmux = <STM32_PINMUX('D', 6, AF7)>; /* USART2_RX */
2493 bias-disable;
2497 usart2_sleep_pins_c: usart2-sleep-2 {
2499 pinmux = <STM32_PINMUX('D', 5, ANALOG)>, /* USART2_TX */
2506 usart3_pins_a: usart3-0 {
2508 pinmux = <STM32_PINMUX('B', 10, AF7)>; /* USART3_TX */
2509 bias-disable;
2510 drive-push-pull;
2511 slew-rate = <0>;
2514 pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */
2515 bias-disable;
2519 usart3_idle_pins_a: usart3-idle-0 {
2521 pinmux = <STM32_PINMUX('B', 10, ANALOG)>; /* USART3_TX */
2524 pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */
2525 bias-disable;
2529 usart3_sleep_pins_a: usart3-sleep-0 {
2531 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
2536 usart3_pins_b: usart3-1 {
2538 pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
2540 bias-disable;
2541 drive-push-pull;
2542 slew-rate = <0>;
2545 pinmux = <STM32_PINMUX('B', 12, AF8)>, /* USART3_RX */
2547 bias-pull-up;
2551 usart3_idle_pins_b: usart3-idle-1 {
2553 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
2557 pinmux = <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
2558 bias-disable;
2559 drive-push-pull;
2560 slew-rate = <0>;
2563 pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */
2564 bias-pull-up;
2568 usart3_sleep_pins_b: usart3-sleep-1 {
2570 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
2577 usart3_pins_c: usart3-2 {
2579 pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
2581 bias-disable;
2582 drive-push-pull;
2583 slew-rate = <0>;
2586 pinmux = <STM32_PINMUX('B', 12, AF8)>, /* USART3_RX */
2588 bias-pull-up;
2592 usart3_idle_pins_c: usart3-idle-2 {
2594 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
2598 pinmux = <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
2599 bias-disable;
2600 drive-push-pull;
2601 slew-rate = <0>;
2604 pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */
2605 bias-pull-up;
2609 usart3_sleep_pins_c: usart3-sleep-2 {
2611 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
2618 usart3_pins_d: usart3-3 {
2620 pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
2622 bias-disable;
2623 drive-push-pull;
2624 slew-rate = <0>;
2627 pinmux = <STM32_PINMUX('D', 9, AF7)>, /* USART3_RX */
2629 bias-disable;
2633 usart3_idle_pins_d: usart3-idle-3 {
2635 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
2640 pinmux = <STM32_PINMUX('D', 9, AF7)>; /* USART3_RX */
2641 bias-disable;
2645 usart3_sleep_pins_d: usart3-sleep-3 {
2647 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
2654 usart3_pins_e: usart3-4 {
2656 pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
2658 bias-disable;
2659 drive-push-pull;
2660 slew-rate = <0>;
2663 pinmux = <STM32_PINMUX('B', 11, AF7)>, /* USART3_RX */
2665 bias-pull-up;
2669 usart3_idle_pins_e: usart3-idle-4 {
2671 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
2675 pinmux = <STM32_PINMUX('G', 8, AF8)>; /* USART3_RTS */
2676 bias-disable;
2677 drive-push-pull;
2678 slew-rate = <0>;
2681 pinmux = <STM32_PINMUX('B', 11, AF7)>; /* USART3_RX */
2682 bias-pull-up;
2686 usart3_sleep_pins_e: usart3-sleep-4 {
2688 pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
2695 usart3_pins_f: usart3-5 {
2697 pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
2699 bias-disable;
2700 drive-push-pull;
2701 slew-rate = <0>;
2704 pinmux = <STM32_PINMUX('B', 12, AF8)>, /* USART3_RX */
2706 bias-disable;
2710 usbotg_hs_pins_a: usbotg-hs-0 {
2712 pinmux = <STM32_PINMUX('A', 10, ANALOG)>; /* OTG_ID */
2716 usbotg_fs_dp_dm_pins_a: usbotg-fs-dp-dm-0 {
2718 pinmux = <STM32_PINMUX('A', 11, ANALOG)>, /* OTG_FS_DM */
2725 i2c2_pins_b2: i2c2-0 {
2727 pinmux = <STM32_PINMUX('Z', 0, AF3)>; /* I2C2_SCL */
2728 bias-disable;
2729 drive-open-drain;
2730 slew-rate = <0>;
2734 i2c2_sleep_pins_b2: i2c2-sleep-0 {
2736 pinmux = <STM32_PINMUX('Z', 0, ANALOG)>; /* I2C2_SCL */
2740 i2c4_pins_a: i2c4-0 {
2742 pinmux = <STM32_PINMUX('Z', 4, AF6)>, /* I2C4_SCL */
2744 bias-disable;
2745 drive-open-drain;
2746 slew-rate = <0>;
2750 i2c4_sleep_pins_a: i2c4-sleep-0 {
2752 pinmux = <STM32_PINMUX('Z', 4, ANALOG)>, /* I2C4_SCL */
2757 i2c6_pins_a: i2c6-0 {
2759 pinmux = <STM32_PINMUX('Z', 6, AF2)>, /* I2C6_SCL */
2761 bias-disable;
2762 drive-open-drain;
2763 slew-rate = <0>;
2767 i2c6_sleep_pins_a: i2c6-sleep-0 {
2769 pinmux = <STM32_PINMUX('Z', 6, ANALOG)>, /* I2C6_SCL */
2774 spi1_pins_a: spi1-0 {
2776 pinmux = <STM32_PINMUX('Z', 0, AF5)>, /* SPI1_SCK */
2778 bias-disable;
2779 drive-push-pull;
2780 slew-rate = <1>;
2784 pinmux = <STM32_PINMUX('Z', 1, AF5)>; /* SPI1_MISO */
2785 bias-disable;
2789 spi1_sleep_pins_a: spi1-sleep-0 {
2791 pinmux = <STM32_PINMUX('Z', 0, ANALOG)>, /* SPI1_SCK */
2797 usart1_pins_b: usart1-1 {
2799 pinmux = <STM32_PINMUX('Z', 7, AF7)>; /* USART1_TX */
2800 bias-disable;
2801 drive-push-pull;
2802 slew-rate = <0>;
2805 pinmux = <STM32_PINMUX('Z', 6, AF7)>; /* USART1_RX */
2806 bias-disable;
2810 usart1_idle_pins_b: usart1-idle-1 {
2812 pinmux = <STM32_PINMUX('Z', 7, ANALOG)>; /* USART1_TX */
2815 pinmux = <STM32_PINMUX('Z', 6, AF7)>; /* USART1_RX */
2816 bias-disable;
2820 usart1_sleep_pins_b: usart1-sleep-1 {
2822 pinmux = <STM32_PINMUX('Z', 7, ANALOG)>, /* USART1_TX */