Lines Matching +full:comms +full:- +full:ssc4 +full:- +full:spi

1 // SPDX-License-Identifier: GPL-2.0-only
6 #include "stih407-pinctrl.dtsi"
7 #include <dt-bindings/mfd/st-lpc.h>
8 #include <dt-bindings/phy/phy.h>
9 #include <dt-bindings/reset/stih407-resets.h>
10 #include <dt-bindings/interrupt-controller/irq-st.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
15 reserved-memory {
16 #address-cells = <1>;
17 #size-cells = <1>;
21 compatible = "shared-dma-pool";
23 no-map;
27 compatible = "shared-dma-pool";
29 no-map;
34 #address-cells = <1>;
35 #size-cells = <0>;
38 compatible = "arm,cortex-a9";
41 /* u-boot puts hpen in SBC dmem at 0xa4 offset */
42 cpu-release-addr = <0x94100A4>;
45 operating-points = <1500000 0
51 clock-names = "cpu";
52 clock-latency = <100000>;
53 cpu0-supply = <&pwm_regulator>;
58 compatible = "arm,cortex-a9";
61 /* u-boot puts hpen in SBC dmem at 0xa4 offset */
62 cpu-release-addr = <0x94100A4>;
65 operating-points = <1500000 0
72 intc: interrupt-controller@8761000 {
73 compatible = "arm,cortex-a9-gic";
74 #interrupt-cells = <3>;
75 interrupt-controller;
80 compatible = "arm,cortex-a9-scu";
85 interrupt-parent = <&intc>;
86 compatible = "arm,cortex-a9-global-timer";
92 l2: cache-controller@8762000 {
93 compatible = "arm,pl310-cache";
95 arm,data-latency = <3 3 3>;
96 arm,tag-latency = <2 2 2>;
97 cache-unified;
98 cache-level = <2>;
101 arm-pmu {
102 interrupt-parent = <&intc>;
103 compatible = "arm,cortex-a9-pmu";
107 pwm_regulator: pwm-regulator {
108 compatible = "pwm-regulator";
110 regulator-name = "CPU_1V0_AVS";
111 regulator-min-microvolt = <784000>;
112 regulator-max-microvolt = <1299000>;
113 regulator-always-on;
114 max-duty-cycle = <255>;
118 restart: restart-controller {
119 compatible = "st,stih407-restart";
124 powerdown: powerdown-controller {
125 compatible = "st,stih407-powerdown";
126 #reset-cells = <1>;
129 softreset: softreset-controller {
130 compatible = "st,stih407-softreset";
131 #reset-cells = <1>;
134 picophyreset: picophyreset-controller {
135 compatible = "st,stih407-picophyreset";
136 #reset-cells = <1>;
139 irq-syscfg {
140 compatible = "st,stih407-irq-syscfg";
142 st,irq-device = <ST_IRQ_SYSCFG_PMU_0>,
144 st,fiq-device = <ST_IRQ_SYSCFG_DISABLED>,
149 compatible = "st,stih407-usb2-phy";
150 #phy-cells = <0>;
154 reset-names = "global", "port";
158 compatible = "st,miphy28lp-phy";
160 #address-cells = <1>;
161 #size-cells = <1>;
168 reg-names = "sata-up",
169 "pcie-up",
173 #phy-cells = <1>;
175 reset-names = "miphy-sw-rst";
183 reg-names = "sata-up",
184 "pcie-up",
189 #phy-cells = <1>;
191 reset-names = "miphy-sw-rst";
198 reg-names = "pipew",
199 "usb3-up";
203 #phy-cells = <1>;
205 reset-names = "miphy-sw-rst";
210 st231_gp0: st231-gp0 {
211 compatible = "st,st231-rproc";
212 memory-region = <&gp0_reserved>;
214 reset-names = "sw_reset";
216 clock-frequency = <600000000>;
218 #mbox-cells = <1>;
219 mbox-names = "vq0_rx", "vq0_tx", "vq1_rx", "vq1_tx";
223 st231_delta: st231-delta {
224 compatible = "st,st231-rproc";
225 memory-region = <&delta_reserved>;
227 reset-names = "sw_reset";
229 clock-frequency = <600000000>;
231 #mbox-cells = <1>;
232 mbox-names = "vq0_rx", "vq0_tx", "vq1_rx", "vq1_tx";
237 compatible = "st,st-delta";
238 clock-names = "delta",
239 "delta-st231",
240 "delta-flash-promip";
247 #address-cells = <1>;
248 #size-cells = <1>;
249 interrupt-parent = <&intc>;
251 compatible = "simple-bus";
253 syscfg_sbc: sbc-syscfg@9620000 {
254 compatible = "st,stih407-sbc-syscfg", "syscon";
258 syscfg_front: front-syscfg@9280000 {
259 compatible = "st,stih407-front-syscfg", "syscon";
263 syscfg_rear: rear-syscfg@9290000 {
264 compatible = "st,stih407-rear-syscfg", "syscon";
268 syscfg_flash: flash-syscfg@92a0000 {
269 compatible = "st,stih407-flash-syscfg", "syscon";
273 syscfg_sbc_reg: fvdp-lite-syscfg@9600000 {
274 compatible = "st,stih407-sbc-reg-syscfg", "syscon";
278 syscfg_core: core-syscfg@92b0000 {
279 compatible = "st,stih407-core-syscfg", "syscon";
282 sti_sasg_codec: sti-sasg-codec {
283 compatible = "st,stih407-sas-codec";
284 #sound-dai-cells = <1>;
290 syscfg_lpm: lpm-syscfg@94b5100 {
291 compatible = "st,stih407-lpm-syscfg", "syscon";
296 vtg_main: sti-vtg-main@8d02800 {
302 vtg_aux: sti-vtg-aux@8d00200 {
313 /* Pinctrl moved out to a per-board configuration */
322 pinctrl-names = "default";
323 pinctrl-0 = <&pinctrl_serial1>;
333 pinctrl-names = "default";
334 pinctrl-0 = <&pinctrl_serial2>;
340 /* SBC_ASC0 - UART10 */
345 pinctrl-names = "default";
346 pinctrl-0 = <&pinctrl_sbc_serial0>;
356 pinctrl-names = "default";
357 pinctrl-0 = <&pinctrl_sbc_serial1>;
364 compatible = "st,comms-ssc4-i2c";
368 clock-names = "ssc";
369 clock-frequency = <400000>;
370 pinctrl-names = "default";
371 pinctrl-0 = <&pinctrl_i2c0_default>;
372 #address-cells = <1>;
373 #size-cells = <0>;
379 compatible = "st,comms-ssc4-i2c";
383 clock-names = "ssc";
384 clock-frequency = <400000>;
385 pinctrl-names = "default";
386 pinctrl-0 = <&pinctrl_i2c1_default>;
387 #address-cells = <1>;
388 #size-cells = <0>;
394 compatible = "st,comms-ssc4-i2c";
398 clock-names = "ssc";
399 clock-frequency = <400000>;
400 pinctrl-names = "default";
401 pinctrl-0 = <&pinctrl_i2c2_default>;
402 #address-cells = <1>;
403 #size-cells = <0>;
409 compatible = "st,comms-ssc4-i2c";
413 clock-names = "ssc";
414 clock-frequency = <400000>;
415 pinctrl-names = "default";
416 pinctrl-0 = <&pinctrl_i2c3_default>;
417 #address-cells = <1>;
418 #size-cells = <0>;
424 compatible = "st,comms-ssc4-i2c";
428 clock-names = "ssc";
429 clock-frequency = <400000>;
430 pinctrl-names = "default";
431 pinctrl-0 = <&pinctrl_i2c4_default>;
432 #address-cells = <1>;
433 #size-cells = <0>;
439 compatible = "st,comms-ssc4-i2c";
443 clock-names = "ssc";
444 clock-frequency = <400000>;
445 pinctrl-names = "default";
446 pinctrl-0 = <&pinctrl_i2c5_default>;
447 #address-cells = <1>;
448 #size-cells = <0>;
456 compatible = "st,comms-ssc4-i2c";
460 clock-names = "ssc";
461 clock-frequency = <400000>;
462 pinctrl-names = "default";
463 pinctrl-0 = <&pinctrl_i2c10_default>;
464 #address-cells = <1>;
465 #size-cells = <0>;
471 compatible = "st,comms-ssc4-i2c";
475 clock-names = "ssc";
476 clock-frequency = <400000>;
477 pinctrl-names = "default";
478 pinctrl-0 = <&pinctrl_i2c11_default>;
479 #address-cells = <1>;
480 #size-cells = <0>;
485 spi@9840000 {
486 compatible = "st,comms-ssc4-spi";
490 clock-names = "ssc";
491 pinctrl-0 = <&pinctrl_spi0_default>;
492 pinctrl-names = "default";
493 #address-cells = <1>;
494 #size-cells = <0>;
499 spi@9841000 {
500 compatible = "st,comms-ssc4-spi";
504 clock-names = "ssc";
505 pinctrl-names = "default";
506 pinctrl-0 = <&pinctrl_spi1_default>;
507 #address-cells = <1>;
508 #size-cells = <0>;
513 spi@9842000 {
514 compatible = "st,comms-ssc4-spi";
518 clock-names = "ssc";
519 pinctrl-names = "default";
520 pinctrl-0 = <&pinctrl_spi2_default>;
521 #address-cells = <1>;
522 #size-cells = <0>;
527 spi@9843000 {
528 compatible = "st,comms-ssc4-spi";
532 clock-names = "ssc";
533 pinctrl-names = "default";
534 pinctrl-0 = <&pinctrl_spi3_default>;
535 #address-cells = <1>;
536 #size-cells = <0>;
541 spi@9844000 {
542 compatible = "st,comms-ssc4-spi";
546 clock-names = "ssc";
547 pinctrl-names = "default";
548 pinctrl-0 = <&pinctrl_spi4_default>;
549 #address-cells = <1>;
550 #size-cells = <0>;
556 spi@9540000 {
557 compatible = "st,comms-ssc4-spi";
561 clock-names = "ssc";
562 pinctrl-names = "default";
563 pinctrl-0 = <&pinctrl_spi10_default>;
564 #address-cells = <1>;
565 #size-cells = <0>;
570 spi@9541000 {
571 compatible = "st,comms-ssc4-spi";
575 clock-names = "ssc";
576 pinctrl-names = "default";
577 pinctrl-0 = <&pinctrl_spi11_default>;
578 #address-cells = <1>;
579 #size-cells = <0>;
584 spi@9542000 {
585 compatible = "st,comms-ssc4-spi";
589 clock-names = "ssc";
590 pinctrl-names = "default";
591 pinctrl-0 = <&pinctrl_spi12_default>;
592 #address-cells = <1>;
593 #size-cells = <0>;
599 compatible = "st,sdhci-stih407", "st,sdhci";
602 reg-names = "mmc", "top-mmc-delay";
604 interrupt-names = "mmcirq";
605 pinctrl-names = "default";
606 pinctrl-0 = <&pinctrl_mmc0>;
607 clock-names = "mmc", "icn";
610 bus-width = <8>;
614 compatible = "st,sdhci-stih407", "st,sdhci";
617 reg-names = "mmc";
619 interrupt-names = "mmcirq";
620 pinctrl-names = "default";
621 pinctrl-0 = <&pinctrl_sd1>;
622 clock-names = "mmc", "icn";
626 bus-width = <4>;
629 /* Watchdog and Real-Time Clock */
631 compatible = "st,stih407-lpc";
635 timeout-sec = <120>;
637 st,lpc-mode = <ST_LPC_MODE_WDT>;
641 compatible = "st,stih407-lpc";
645 st,lpc-mode = <ST_LPC_MODE_CLKSRC>;
649 compatible = "st,spi-fsm";
651 reg-names = "spi-fsm";
653 clock-names = "emi_clk";
654 pinctrl-names = "default";
655 pinctrl-0 = <&pinctrl_fsm>;
657 st,boot-device-reg = <0x8c4>;
658 st,boot-device-spi = <0x68>;
668 interrupt-names = "hostc";
671 phy-names = "ahci_phy";
676 reset-names = "pwr-dwn", "sw-rst", "pwr-rst";
678 clock-names = "ahci_clk";
681 ports-implemented = <0x1>;
691 interrupt-names = "hostc";
694 phy-names = "ahci_phy";
699 reset-names = "pwr-dwn",
700 "sw-rst",
701 "pwr-rst";
703 clock-names = "ahci_clk";
706 ports-implemented = <0x1>;
713 compatible = "st,stih407-dwc3";
715 reg-names = "reg-glue", "syscfg-reg";
719 reset-names = "powerdown", "softreset";
720 #address-cells = <1>;
721 #size-cells = <1>;
722 pinctrl-names = "default";
723 pinctrl-0 = <&pinctrl_usb3>;
733 phy-names = "usb2-phy", "usb3-phy";
740 /* COMMS PWM Module */
742 compatible = "st,sti-pwm";
743 #pwm-cells = <2>;
746 pinctrl-names = "default";
747 pinctrl-0 = <&pinctrl_pwm0_chan0_default>;
748 clock-names = "pwm";
750 st,pwm-num-chan = <1>;
757 compatible = "st,sti-pwm";
758 #pwm-cells = <2>;
761 pinctrl-names = "default";
762 pinctrl-0 = <&pinctrl_pwm1_chan0_default
766 clock-names = "pwm";
768 st,pwm-num-chan = <4>;
790 compatible = "st,stih407-dwmac", "snps,dwmac", "snps,dwmac-3.710";
792 reg-names = "stmmaceth", "sti-ethconf";
797 reset-names = "stmmaceth";
801 interrupt-names = "macirq", "eth_wake_irq";
806 pinctrl-names = "default";
807 pinctrl-0 = <&pinctrl_rgmii1>;
809 clock-names = "stmmaceth", "sti-ethclk";
815 compatible = "st,stih407-mailbox";
818 #mbox-cells = <2>;
819 mbox-name = "a9";
824 compatible = "st,stih407-mailbox";
826 #mbox-cells = <2>;
827 mbox-name = "st231_gp_1";
832 compatible = "st,stih407-mailbox";
834 #mbox-cells = <2>;
835 mbox-name = "st231_gp_0";
840 compatible = "st,stih407-mailbox";
842 #mbox-cells = <2>;
843 mbox-name = "st231_audio_video";
848 fdma0: dma-controller@8e20000 {
849 compatible = "st,stih407-fdma-mpe31-11", "st,slim-rproc";
854 reg-names = "slimcore", "dmem", "peripherals", "imem";
860 dma-channels = <16>;
861 #dma-cells = <3>;
865 fdma1: dma-controller@8e40000 {
866 compatible = "st,stih407-fdma-mpe31-12", "st,slim-rproc";
871 reg-names = "slimcore", "dmem", "peripherals", "imem";
878 dma-channels = <16>;
879 #dma-cells = <3>;
885 fdma2: dma-controller@8e60000 {
886 compatible = "st,stih407-fdma-mpe31-13", "st,slim-rproc";
891 reg-names = "slimcore", "dmem", "peripherals", "imem";
893 dma-channels = <16>;
894 #dma-cells = <3>;
903 sti_uni_player0: sti-uni-player@8d80000 {
904 compatible = "st,stih407-uni-player-hdmi";
905 #sound-dai-cells = <0>;
908 assigned-clocks = <&clk_s_d0_quadfs 0>, <&clk_s_d0_flexgen CLK_PCM_0>;
909 assigned-clock-parents = <0>, <&clk_s_d0_quadfs 0>;
910 assigned-clock-rates = <50000000>;
914 dma-names = "tx";
919 sti_uni_player1: sti-uni-player@8d81000 {
920 compatible = "st,stih407-uni-player-pcm-out";
921 #sound-dai-cells = <0>;
924 assigned-clocks = <&clk_s_d0_quadfs 1>, <&clk_s_d0_flexgen CLK_PCM_1>;
925 assigned-clock-parents = <0>, <&clk_s_d0_quadfs 1>;
926 assigned-clock-rates = <50000000>;
930 dma-names = "tx";
935 sti_uni_player2: sti-uni-player@8d82000 {
936 compatible = "st,stih407-uni-player-dac";
937 #sound-dai-cells = <0>;
940 assigned-clocks = <&clk_s_d0_quadfs 2>, <&clk_s_d0_flexgen CLK_PCM_2>;
941 assigned-clock-parents = <0>, <&clk_s_d0_quadfs 2>;
942 assigned-clock-rates = <50000000>;
946 dma-names = "tx";
951 sti_uni_player3: sti-uni-player@8d85000 {
952 compatible = "st,stih407-uni-player-spdif";
953 #sound-dai-cells = <0>;
956 assigned-clocks = <&clk_s_d0_quadfs 3>, <&clk_s_d0_flexgen CLK_SPDIFF>;
957 assigned-clock-parents = <0>, <&clk_s_d0_quadfs 3>;
958 assigned-clock-rates = <50000000>;
962 dma-names = "tx";
967 sti_uni_reader0: sti-uni-reader@8d83000 {
968 compatible = "st,stih407-uni-reader-pcm_in";
969 #sound-dai-cells = <0>;
974 dma-names = "rx";
979 sti_uni_reader1: sti-uni-reader@8d84000 {
980 compatible = "st,stih407-uni-reader-hdmi";
981 #sound-dai-cells = <0>;
986 dma-names = "rx";