Lines Matching +full:1 +full:a400000
13 #address-cells = <1>;
14 #size-cells = <1>;
17 #address-cells = <1>;
28 cpu@1 {
31 reg = <1>;
58 #address-cells = <1>;
59 #size-cells = <1>;
80 #address-cells = <1>;
107 clocks = <&peri_clk 1>;
108 resets = <&peri_rst 1>;
151 #address-cells = <1>;
165 #address-cells = <1>;
179 #address-cells = <1>;
193 #address-cells = <1>;
209 #address-cells = <1>;
221 #address-cells = <1>;
234 #size-cells = <1>;
251 #clock-cells = <1>;
256 #reset-cells = <1>;
267 #clock-cells = <1>;
272 #reset-cells = <1>;
289 #dma-cells = <1>;
292 sd: mmc@5a400000 {
299 pinctrl-1 = <&pinctrl_sd_uhs>;
320 clocks = <&mio_clk 1>;
322 resets = <&mio_rst 1>, <&mio_rst 4>, <&mio_rst 6>;
390 #address-cells = <1>;
398 usb_phy1: phy@1 {
399 reg = <1>;
418 #clock-cells = <1>;
426 #address-cells = <1>;
427 #size-cells = <1>;
492 #clock-cells = <1>;
497 #reset-cells = <1>;
518 #address-cells = <1>;
531 ports-implemented = <1>;
541 #address-cells = <1>;
542 #size-cells = <1>;
552 #reset-cells = <1>;
564 <&ahci0_rst 0>, <&ahci0_rst 1>,
578 ports-implemented = <1>;
588 #address-cells = <1>;
589 #size-cells = <1>;
599 #reset-cells = <1>;
611 <&ahci1_rst 0>, <&ahci1_rst 1>,
637 #address-cells = <1>;
638 #size-cells = <1>;
664 #reset-cells = <1>;
692 #address-cells = <1>;
693 #size-cells = <1>;
708 #reset-cells = <1>;
721 #address-cells = <1>;