Lines Matching full:cru
6 #include <dt-bindings/clock/rockchip,rv1126-cru.h>
35 clocks = <&cru ARMCLK>;
43 clocks = <&cru ARMCLK>;
51 clocks = <&cru ARMCLK>;
59 clocks = <&cru ARMCLK>;
178 clocks = <&cru HCLK_EMMC>,
179 <&cru CLK_EMMC>,
180 <&cru HCLK_NANDC>,
181 <&cru CLK_NANDC>,
182 <&cru HCLK_SFC>,
183 <&cru HCLK_SFCXIP>,
184 <&cru SCLK_SFC>;
193 clocks = <&cru HCLK_SDIO>,
194 <&cru CLK_SDIO>;
201 clocks = <&cru ACLK_RGA>,
202 <&cru HCLK_RGA>,
203 <&cru CLK_RGA_CORE>,
204 <&cru ACLK_VOP>,
205 <&cru HCLK_VOP>,
206 <&cru DCLK_VOP>,
207 <&cru PCLK_DSIHOST>,
208 <&cru ACLK_IEP>,
209 <&cru HCLK_IEP>,
210 <&cru CLK_IEP_CORE>;
258 cru: clock-controller@ff490000 { label
259 compatible = "rockchip,rv1126-cru";
275 clocks = <&cru ACLK_DMAC>;
284 clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
300 clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
316 clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>;
332 clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;
348 clocks = <&cru SCLK_UART5>, <&cru PCLK_UART5>;
364 clocks = <&cru CLK_SARADC>, <&cru PCLK_SARADC>;
366 resets = <&cru SRST_SARADC_P>;
375 clocks = <&cru PCLK_TIMER>, <&cru CLK_TIMER0>;
384 clocks = <&cru ACLK_VOP>, <&cru DCLK_VOP>, <&cru HCLK_VOP>;
386 resets = <&cru SRST_VOP_A>, <&cru SRST_VOP_H>, <&cru SRST_VOP_D>;
410 clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>;
423 clocks = <&cru CLK_GMAC_SRC>, <&cru CLK_GMAC_TX_RX>,
424 <&cru CLK_GMAC_TX_RX>, <&cru CLK_GMAC_REF>,
425 <&cru ACLK_GMAC>, <&cru PCLK_GMAC>,
426 <&cru CLK_GMAC_TX_RX>, <&cru CLK_GMAC_PTPREF>;
431 resets = <&cru SRST_GMAC_A>;
469 clocks = <&cru HCLK_EMMC>, <&cru CLK_EMMC>,
470 <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
482 clocks = <&cru HCLK_SDMMC>, <&cru CLK_SDMMC>,
483 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
494 clocks = <&cru HCLK_SDIO>, <&cru CLK_SDIO>,
495 <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
507 assigned-clocks = <&cru SCLK_SFC>;
510 clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>;
538 clocks = <&cru PCLK_GPIO1>, <&cru DBCLK_GPIO1>;
549 clocks = <&cru PCLK_GPIO2>, <&cru DBCLK_GPIO2>;
560 clocks = <&cru PCLK_GPIO3>, <&cru DBCLK_GPIO3>;
571 clocks = <&cru PCLK_GPIO4>, <&cru DBCLK_GPIO4>;