dts/rockchip/rk3128.dtsi

29 		#size-cells = <0>;
34 			reg = <0xf00>;
47 			reg = <0xf01>;
53 			reg = <0xf02>;
59 			reg = <0xf03>;
77 		#clock-cells = <0>;
82 		reg = <0x100a0000 0x1000>;
87 		reg = <0x10139000 0x1000>,
88 		      <0x1013a000 0x1000>,
89 		      <0x1013c000 0x2000>,
90 		      <0x1013e000 0x2000>;
94 		#address-cells = <0>;
99 		reg = <0x10180000 0x40000>;
111 		reg = <0x101c0000 0x20000>;
120 		reg = <0x101e0000 0x20000>;
129 		reg = <0x10214000 0x4000>;
145 		reg = <0x10218000 0x4000>;
161 		reg = <0x1021c000 0x4000>;
177 		reg = <0x10500000 0x4000>;
182 		pinctrl-0 = <&flash_ale &flash_bus8 &flash_cle &flash_cs0
189 		reg = <0x20000000 0x1000>;
201 		reg = <0x20008000 0x1000>;
207 			reg = <0x017c 0x0c>;
211 			#clock-cells = <0>;
217 				#phy-cells = <0>;
227 				#phy-cells = <0>;
235 		reg = <0x20044000 0x20>;
243 		reg = <0x20044020 0x20>;
251 		reg = <0x20044040 0x20>;
259 		reg = <0x20044060 0x20>;
267 		reg = <0x20044080 0x20>;
275 		reg = <0x200440a0 0x20>;
283 		reg = <0x2004c000 0x100>;
291 		reg = <0x20050000 0x10>;
294 		pinctrl-0 = <&pwm0_pin>;
301 		reg = <0x20050010 0x10>;
304 		pinctrl-0 = <&pwm1_pin>;
311 		reg = <0x20050020 0x10>;
314 		pinctrl-0 = <&pwm2_pin>;
321 		reg = <0x20050030 0x10>;
324 		pinctrl-0 = <&pwm3_pin>;
331 		reg = <0x20056000 0x1000>;
336 		pinctrl-0 = <&i2c1_xfer>;
338 		#size-cells = <0>;
344 		reg = <0x2005a000 0x1000>;
349 		pinctrl-0 = <&i2c2_xfer>;
351 		#size-cells = <0>;
357 		reg = <0x2005e000 0x1000>;
362 		pinctrl-0 = <&i2c3_xfer>;
364 		#size-cells = <0>;
370 		reg = <0x20060000 0x100>;
378 		pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
386 		reg = <0x20064000 0x100>;
394 		pinctrl-0 = <&uart1_xfer>;
402 		reg = <0x20068000 0x100>;
410 		pinctrl-0 = <&uart2_xfer>;
418 		reg = <0x2006c000 0x100>;
430 		reg = <0x20072000 0x1000>;
435 		pinctrl-0 = <&i2c0_xfer>;
437 		#size-cells = <0>;
443 		reg = <0x20074000 0x1000>;
450 		pinctrl-0 = <&spi0_tx &spi0_rx &spi0_clk &spi0_cs0 &spi0_cs1>;
452 		#size-cells = <0>;
458 		reg = <0x20078000 0x4000>;
459 		interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
477 			reg = <0x2007c000 0x100>;
488 			reg = <0x20080000 0x100>;
499 			reg = <0x20084000 0x100>;
510 			reg = <0x20088000 0x100>;
602 				rockchip,pins = <0 RK_PA6 2 &pcfg_pull_none>,
603 						<0 RK_PA7 2 &pcfg_pull_none>;
607 				rockchip,pins = <0 RK_PB7 1 &pcfg_pull_none>;
611 				rockchip,pins = <0 RK_PC4 1 &pcfg_pull_none>;
617 				rockchip,pins = <0 RK_PA0 1 &pcfg_pull_none>,
618 						<0 RK_PA1 1 &pcfg_pull_none>;
624 				rockchip,pins = <0 RK_PA2 1 &pcfg_pull_none>,
625 						<0 RK_PA3 1 &pcfg_pull_none>;
638 				rockchip,pins = <0 RK_PA6 1 &pcfg_pull_none>,
639 						<0 RK_PA7 1 &pcfg_pull_none>;
645 				rockchip,pins = <0 RK_PB0 1 &pcfg_pull_none>,
646 						<0 RK_PB1 1 &pcfg_pull_none>,
647 						<0 RK_PB3 1 &pcfg_pull_none>,
648 						<0 RK_PB4 1 &pcfg_pull_none>,
649 						<0 RK_PB5 1 &pcfg_pull_none>,
650 						<0 RK_PB6 1 &pcfg_pull_none>;
741 				rockchip,pins = <0 RK_PD2 1 &pcfg_pull_none>;
747 				rockchip,pins = <0 RK_PD3 1 &pcfg_pull_none>;
753 				rockchip,pins = <0 RK_PD4 1 &pcfg_pull_none>;
769 				rockchip,pins = <0 RK_PA3 2 &pcfg_pull_default>;
773 				rockchip,pins = <0 RK_PD6 1 &pcfg_pull_default>;
857 				rockchip,pins = <0 RK_PB1 2 &pcfg_pull_default>;
861 				rockchip,pins = <0 RK_PB6 2 &pcfg_pull_default>;
865 				rockchip,pins = <0 RK_PB3 2 &pcfg_pull_default>;
869 				rockchip,pins = <0 RK_PB5 2 &pcfg_pull_default>;
884 				rockchip,pins = <0 RK_PC1 2 &pcfg_pull_none>;
910 				rockchip,pins = <0 RK_PD1 1 &pcfg_pull_none>;
914 				rockchip,pins = <0 RK_PD0 1 &pcfg_pull_none>;