Lines Matching +full:0 +full:xe6ef2000

40 		#clock-cells = <0>;
42 clock-frequency = <0>;
47 #size-cells = <0>;
49 cpu0: cpu@0 {
52 reg = <0>;
71 L2_CA15: cache-controller-0 {
82 #clock-cells = <0>;
84 clock-frequency = <0>;
97 #clock-cells = <0>;
99 clock-frequency = <0>;
113 reg = <0 0xe6020000 0 0x0c>;
124 reg = <0 0xe6050000 0 0x50>;
128 gpio-ranges = <&pfc 0 0 29>;
139 reg = <0 0xe6051000 0 0x50>;
143 gpio-ranges = <&pfc 0 32 23>;
154 reg = <0 0xe6052000 0 0x50>;
158 gpio-ranges = <&pfc 0 64 32>;
169 reg = <0 0xe6053000 0 0x50>;
173 gpio-ranges = <&pfc 0 96 28>;
184 reg = <0 0xe6054000 0 0x50>;
188 gpio-ranges = <&pfc 0 128 17>;
199 reg = <0 0xe6055000 0 0x50>;
203 gpio-ranges = <&pfc 0 160 17>;
214 reg = <0 0xe6055100 0 0x50>;
218 gpio-ranges = <&pfc 0 192 17>;
229 reg = <0 0xe6055200 0 0x50>;
233 gpio-ranges = <&pfc 0 224 17>;
244 reg = <0 0xe6055300 0 0x50>;
248 gpio-ranges = <&pfc 0 256 17>;
259 reg = <0 0xe6055400 0 0x50>;
263 gpio-ranges = <&pfc 0 288 17>;
274 reg = <0 0xe6055500 0 0x50>;
278 gpio-ranges = <&pfc 0 320 32>;
289 reg = <0 0xe6055600 0 0x50>;
293 gpio-ranges = <&pfc 0 352 30>;
303 reg = <0 0xe6060000 0 0x144>;
308 reg = <0 0xe6150000 0 0x1000>;
312 #power-domain-cells = <0>;
318 reg = <0 0xe6152000 0 0x188>;
324 reg = <0 0xe6160000 0 0x0100>;
329 reg = <0 0xe6180000 0 0x0200>;
337 reg = <0 0xe61c0000 0 0x200>;
338 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
349 reg = <0 0xe63a0000 0 0x12000>;
352 ranges = <0 0 0xe63a0000 0x12000>;
357 reg = <0 0xe63c0000 0 0x1000>;
360 ranges = <0 0 0xe63c0000 0x1000>;
362 smp-sram@0 {
364 reg = <0 0x100>;
372 reg = <0 0xe6508000 0 0x40>;
379 #size-cells = <0>;
386 reg = <0 0xe6518000 0 0x40>;
393 #size-cells = <0>;
400 reg = <0 0xe6530000 0 0x40>;
407 #size-cells = <0>;
414 reg = <0 0xe6540000 0 0x40>;
421 #size-cells = <0>;
428 reg = <0 0xe6520000 0 0x40>;
435 #size-cells = <0>;
442 reg = <0 0xe6528000 0 0x40>;
449 #size-cells = <0>;
455 #size-cells = <0>;
459 reg = <0 0xe60b0000 0 0x425>;
462 dmas = <&dmac0 0x77>, <&dmac0 0x78>,
463 <&dmac1 0x77>, <&dmac1 0x78>;
473 reg = <0 0xe6700000 0 0x20000>;
506 reg = <0 0xe6720000 0 0x20000>;
539 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
546 #size-cells = <0>;
552 reg = <0 0xe6b10000 0 0x2c>;
555 dmas = <&dmac0 0x17>, <&dmac0 0x18>,
556 <&dmac1 0x17>, <&dmac1 0x18>;
562 #size-cells = <0>;
569 reg = <0 0xe6e60000 0 64>;
574 dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
575 <&dmac1 0x29>, <&dmac1 0x2a>;
585 reg = <0 0xe6e68000 0 64>;
590 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
591 <&dmac1 0x2d>, <&dmac1 0x2e>;
601 reg = <0 0xe6e58000 0 64>;
606 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
607 <&dmac1 0x2b>, <&dmac1 0x2c>;
617 reg = <0 0xe6ea8000 0 64>;
622 dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
623 <&dmac1 0x2f>, <&dmac1 0x30>;
633 reg = <0 0xe62c0000 0 96>;
638 dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
639 <&dmac1 0x39>, <&dmac1 0x3a>;
649 reg = <0 0xe62c8000 0 96>;
654 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
655 <&dmac1 0x4d>, <&dmac1 0x4e>;
665 reg = <0 0xe6e20000 0 0x0064>;
668 dmas = <&dmac0 0x51>, <&dmac0 0x52>,
669 <&dmac1 0x51>, <&dmac1 0x52>;
674 #size-cells = <0>;
681 reg = <0 0xe6e10000 0 0x0064>;
684 dmas = <&dmac0 0x55>, <&dmac0 0x56>,
685 <&dmac1 0x55>, <&dmac1 0x56>;
690 #size-cells = <0>;
697 reg = <0 0xe6e80000 0 0x1000>;
710 reg = <0 0xe6e88000 0 0x1000>;
723 reg = <0 0xe6ef0000 0 0x1000>;
734 reg = <0 0xe6ef1000 0 0x1000>;
745 reg = <0 0xe6ef2000 0 0x1000>;
756 reg = <0 0xe6ef3000 0 0x1000>;
767 reg = <0 0xe6ef4000 0 0x1000>;
778 reg = <0 0xe6ef5000 0 0x1000>;
789 reg = <0 0xee100000 0 0x328>;
790 interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>;
791 dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
792 <&dmac1 0xcd>, <&dmac1 0xce>;
804 reg = <0 0xf1001000 0 0x1000>,
805 <0 0xf1002000 0 0x2000>,
806 <0 0xf1004000 0 0x2000>,
807 <0 0xf1006000 0 0x2000>;
818 reg = <0 0xfe928000 0 0x8000>;
827 reg = <0 0xfe930000 0 0x8000>;
836 reg = <0 0xfe938000 0 0x8000>;
846 reg = <0 0xfe980000 0 0x10300>;
855 reg = <0 0xfeb00000 0 0x40000>;
859 clock-names = "du.0", "du.1";
861 reset-names = "du.0";
866 #size-cells = <0>;
868 port@0 {
869 reg = <0>;
883 reg = <0 0xff000044 0 4>;
889 reg = <0 0xffca0000 0 0x1004>;
903 reg = <0 0xe6130000 0 0x1004>;