Lines Matching full:cpg
10 #include <dt-bindings/clock/r8a7745-cpg-mssr.h>
73 clocks = <&cpg CPG_CORE R8A7745_CLK_Z2>;
84 clocks = <&cpg CPG_CORE R8A7745_CLK_Z2>;
139 clocks = <&cpg CPG_MOD 912>;
141 resets = <&cpg 912>;
154 clocks = <&cpg CPG_MOD 911>;
156 resets = <&cpg 911>;
169 clocks = <&cpg CPG_MOD 910>;
171 resets = <&cpg 910>;
184 clocks = <&cpg CPG_MOD 909>;
186 resets = <&cpg 909>;
199 clocks = <&cpg CPG_MOD 908>;
201 resets = <&cpg 908>;
214 clocks = <&cpg CPG_MOD 907>;
216 resets = <&cpg 907>;
229 clocks = <&cpg CPG_MOD 905>;
231 resets = <&cpg 905>;
242 clocks = <&cpg CPG_MOD 304>;
244 resets = <&cpg 304>;
249 cpg: clock-controller@e6150000 { label
250 compatible = "renesas,r8a7745-cpg-mssr";
275 clocks = <&cpg CPG_MOD 402>;
277 resets = <&cpg 402>;
302 clocks = <&cpg CPG_MOD 407>;
304 resets = <&cpg 407>;
400 clocks = <&cpg CPG_MOD 931>;
402 resets = <&cpg 931>;
414 clocks = <&cpg CPG_MOD 930>;
416 resets = <&cpg 930>;
428 clocks = <&cpg CPG_MOD 929>;
430 resets = <&cpg 929>;
442 clocks = <&cpg CPG_MOD 928>;
444 resets = <&cpg 928>;
456 clocks = <&cpg CPG_MOD 927>;
458 resets = <&cpg 927>;
470 clocks = <&cpg CPG_MOD 925>;
472 resets = <&cpg 925>;
485 clocks = <&cpg CPG_MOD 318>;
490 resets = <&cpg 318>;
502 clocks = <&cpg CPG_MOD 323>;
507 resets = <&cpg 323>;
516 clocks = <&cpg CPG_MOD 704>;
521 resets = <&cpg 704>;
534 clocks = <&cpg CPG_MOD 704>;
537 resets = <&cpg 704>;
557 clocks = <&cpg CPG_MOD 330>;
559 resets = <&cpg 330>;
571 clocks = <&cpg CPG_MOD 331>;
573 resets = <&cpg 331>;
603 clocks = <&cpg CPG_MOD 219>;
606 resets = <&cpg 219>;
636 clocks = <&cpg CPG_MOD 218>;
639 resets = <&cpg 218>;
649 clocks = <&cpg CPG_MOD 812>;
652 resets = <&cpg 812>;
662 clocks = <&cpg CPG_MOD 917>;
670 resets = <&cpg 917>;
679 clocks = <&cpg CPG_MOD 204>;
685 resets = <&cpg 204>;
694 clocks = <&cpg CPG_MOD 203>;
700 resets = <&cpg 203>;
709 clocks = <&cpg CPG_MOD 202>;
715 resets = <&cpg 202>;
724 clocks = <&cpg CPG_MOD 1106>;
730 resets = <&cpg 1106>;
739 clocks = <&cpg CPG_MOD 1107>;
745 resets = <&cpg 1107>;
754 clocks = <&cpg CPG_MOD 1108>;
760 resets = <&cpg 1108>;
769 clocks = <&cpg CPG_MOD 206>;
775 resets = <&cpg 206>;
784 clocks = <&cpg CPG_MOD 207>;
790 resets = <&cpg 207>;
799 clocks = <&cpg CPG_MOD 216>;
805 resets = <&cpg 216>;
814 clocks = <&cpg CPG_MOD 721>,
815 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
821 resets = <&cpg 721>;
830 clocks = <&cpg CPG_MOD 720>,
831 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
837 resets = <&cpg 720>;
846 clocks = <&cpg CPG_MOD 719>,
847 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
853 resets = <&cpg 719>;
862 clocks = <&cpg CPG_MOD 718>,
863 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
869 resets = <&cpg 718>;
878 clocks = <&cpg CPG_MOD 715>,
879 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
885 resets = <&cpg 715>;
894 clocks = <&cpg CPG_MOD 714>,
895 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
901 resets = <&cpg 714>;
910 clocks = <&cpg CPG_MOD 717>,
911 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
917 resets = <&cpg 717>;
926 clocks = <&cpg CPG_MOD 716>,
927 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
933 resets = <&cpg 716>;
942 clocks = <&cpg CPG_MOD 713>,
943 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
949 resets = <&cpg 713>;
958 clocks = <&cpg CPG_MOD 000>;
965 resets = <&cpg 000>;
974 clocks = <&cpg CPG_MOD 208>;
981 resets = <&cpg 208>;
990 clocks = <&cpg CPG_MOD 205>;
997 resets = <&cpg 205>;
1004 clocks = <&cpg CPG_MOD 523>;
1006 resets = <&cpg 523>;
1014 clocks = <&cpg CPG_MOD 523>;
1016 resets = <&cpg 523>;
1024 clocks = <&cpg CPG_MOD 523>;
1026 resets = <&cpg 523>;
1034 clocks = <&cpg CPG_MOD 523>;
1036 resets = <&cpg 523>;
1044 clocks = <&cpg CPG_MOD 523>;
1046 resets = <&cpg 523>;
1054 clocks = <&cpg CPG_MOD 523>;
1056 resets = <&cpg 523>;
1064 clocks = <&cpg CPG_MOD 523>;
1066 resets = <&cpg 523>;
1076 clocks = <&cpg CPG_MOD 916>,
1077 <&cpg CPG_CORE R8A7745_CLK_RCAN>,
1081 resets = <&cpg 916>;
1090 clocks = <&cpg CPG_MOD 915>,
1091 <&cpg CPG_CORE R8A7745_CLK_RCAN>,
1095 resets = <&cpg 915>;
1104 clocks = <&cpg CPG_MOD 811>;
1106 resets = <&cpg 811>;
1115 clocks = <&cpg CPG_MOD 810>;
1117 resets = <&cpg 810>;
1137 clocks = <&cpg CPG_MOD 1005>,
1138 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1139 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1140 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1141 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1142 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1143 <&cpg CPG_MOD 1025>, <&cpg CPG_MOD 1026>,
1144 <&cpg CPG_MOD 1027>, <&cpg CPG_MOD 1028>,
1145 <&cpg CPG_MOD 1029>, <&cpg CPG_MOD 1030>,
1146 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1147 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1148 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1150 <&cpg CPG_CORE R8A7745_CLK_M2>;
1162 resets = <&cpg 1005>,
1163 <&cpg 1006>, <&cpg 1007>, <&cpg 1008>,
1164 <&cpg 1009>, <&cpg 1010>, <&cpg 1011>,
1165 <&cpg 1012>, <&cpg 1013>, <&cpg 1014>,
1166 <&cpg 1015>;
1324 clocks = <&cpg CPG_MOD 502>;
1327 resets = <&cpg 502>;
1339 clocks = <&cpg CPG_MOD 703>;
1341 resets = <&cpg 703>;
1374 clocks = <&cpg CPG_MOD 703>;
1376 resets = <&cpg 703>;
1407 clocks = <&cpg CPG_MOD 314>;
1413 resets = <&cpg 314>;
1422 clocks = <&cpg CPG_MOD 312>;
1428 resets = <&cpg 312>;
1437 clocks = <&cpg CPG_MOD 311>;
1443 resets = <&cpg 311>;
1452 clocks = <&cpg CPG_MOD 315>;
1457 resets = <&cpg 315>;
1468 clocks = <&cpg CPG_MOD 813>;
1470 resets = <&cpg 813>;
1485 clocks = <&cpg CPG_MOD 408>;
1488 resets = <&cpg 408>;
1495 clocks = <&cpg CPG_MOD 131>;
1497 resets = <&cpg 131>;
1504 clocks = <&cpg CPG_MOD 128>;
1506 resets = <&cpg 128>;
1514 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
1516 resets = <&cpg 724>;
1548 clocks = <&cpg CPG_MOD 124>;
1551 resets = <&cpg 124>;
1567 clocks = <&cpg CPG_MOD 329>;
1570 resets = <&cpg 329>;