dts/renesas/r8a73a4.dtsi

1 // SPDX-License-Identifier: GPL-2.0
3  * Device Tree Source for the r8a73a4 SoC
9 #include <dt-bindings/clock/r8a73a4-clock.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
14 	compatible = "renesas,r8a73a4";
15 	interrupt-parent = <&gic>;
16 	#address-cells = <2>;
17 	#size-cells = <2>;
20 		#address-cells = <1>;
21 		#size-cells = <0>;
25 			compatible = "arm,cortex-a15";
28 			clock-frequency = <1500000000>;
29 			power-domains = <&pd_a2sl>;
30 			next-level-cache = <&L2_CA15>;
33 		L2_CA15: cache-controller-0 {
36 			power-domains = <&pd_a3sm>;
37 			cache-unified;
38 			cache-level = <2>;
41 		L2_CA7: cache-controller-1 {
44 			power-domains = <&pd_a3km>;
45 			cache-unified;
46 			cache-level = <2>;
51 		compatible = "arm,coresight-etm3x";
52 		power-domains = <&pd_d4>;
56 		compatible = "arm,armv7-timer";
63 	dbsc1: memory-controller@e6790000 {
64 		compatible = "renesas,dbsc-r8a73a4";
66 		power-domains = <&pd_a3bc>;
69 	dbsc2: memory-controller@e67a0000 {
70 		compatible = "renesas,dbsc-r8a73a4";
72 		power-domains = <&pd_a3bc>;
76 		#address-cells = <1>;
77 		#size-cells = <0>;
78 		compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic";
82 		power-domains = <&pd_a3sp>;
88 		compatible = "renesas,r8a73a4-cmt1", "renesas,rcar-gen2-cmt1";
99 		clock-names = "fck";
100 		power-domains = <&pd_c5>;
104 	irqc0: interrupt-controller@e61c0000 {
105 		compatible = "renesas,irqc-r8a73a4", "renesas,irqc";
106 		#interrupt-cells = <2>;
107 		interrupt-controller;
142 		power-domains = <&pd_c4>;
145 	irqc1: interrupt-controller@e61c0200 {
146 		compatible = "renesas,irqc-r8a73a4", "renesas,irqc";
147 		#interrupt-cells = <2>;
148 		interrupt-controller;
177 		power-domains = <&pd_c4>;
181 		compatible = "renesas,pfc-r8a73a4";
183 		gpio-controller;
184 		#gpio-cells = <2>;
185 		gpio-ranges =
192 		interrupts-extended =
208 		power-domains = <&pd_c5>;
212 		compatible = "renesas,thermal-r8a73a4", "renesas,rcar-thermal";
217 		power-domains = <&pd_c5>;
221 		#address-cells = <1>;
222 		#size-cells = <0>;
223 		compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic";
227 		power-domains = <&pd_a3sp>;
232 		#address-cells = <1>;
233 		#size-cells = <0>;
234 		compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic";
238 		power-domains = <&pd_a3sp>;
243 		#address-cells = <1>;
244 		#size-cells = <0>;
245 		compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic";
249 		power-domains = <&pd_a3sp>;
254 		#address-cells = <1>;
255 		#size-cells = <0>;
256 		compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic";
260 		power-domains = <&pd_a3sp>;
265 		#address-cells = <1>;
266 		#size-cells = <0>;
267 		compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic";
271 		power-domains = <&pd_a3sp>;
276 		#address-cells = <1>;
277 		#size-cells = <0>;
278 		compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic";
282 		power-domains = <&pd_a3sp>;
287 		#address-cells = <1>;
288 		#size-cells = <0>;
289 		compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic";
293 		power-domains = <&pd_a3sp>;
298 		#address-cells = <1>;
299 		#size-cells = <0>;
300 		compatible = "renesas,iic-r8a73a4", "renesas,rmobile-iic";
304 		power-domains = <&pd_a3sp>;
309 		compatible = "renesas,scifb-r8a73a4", "renesas,scifb";
313 		clock-names = "fck";
314 		power-domains = <&pd_a3sp>;
319 		compatible = "renesas,scifb-r8a73a4", "renesas,scifb";
323 		clock-names = "fck";
324 		power-domains = <&pd_a3sp>;
329 		compatible = "renesas,scifa-r8a73a4", "renesas,scifa";
333 		clock-names = "fck";
334 		power-domains = <&pd_a3sp>;
339 		compatible = "renesas,scifa-r8a73a4", "renesas,scifa";
343 		clock-names = "fck";
344 		power-domains = <&pd_a3sp>;
349 		compatible = "renesas,scifb-r8a73a4", "renesas,scifb";
353 		clock-names = "fck";
354 		power-domains = <&pd_a3sp>;
359 		compatible = "renesas,scifb-r8a73a4", "renesas,scifb";
363 		clock-names = "fck";
364 		power-domains = <&pd_c4>;
369 		compatible = "renesas,sdhi-r8a73a4";
373 		power-domains = <&pd_a3sp>;
374 		cap-sd-highspeed;
379 		compatible = "renesas,sdhi-r8a73a4";
383 		power-domains = <&pd_a3sp>;
384 		cap-sd-highspeed;
389 		compatible = "renesas,sdhi-r8a73a4";
393 		power-domains = <&pd_a3sp>;
394 		cap-sd-highspeed;
399 		compatible = "renesas,mmcif-r8a73a4", "renesas,sh-mmcif";
403 		power-domains = <&pd_a3sp>;
404 		reg-io-width = <4>;
409 		compatible = "renesas,mmcif-r8a73a4", "renesas,sh-mmcif";
413 		power-domains = <&pd_a3sp>;
414 		reg-io-width = <4>;
418 	gic: interrupt-controller@f1001000 {
419 		compatible = "arm,gic-400";
420 		#interrupt-cells = <3>;
421 		#address-cells = <0>;
422 		interrupt-controller;
429 		clock-names = "clk";
430 		power-domains = <&pd_c4>;
434 		compatible = "renesas,bsc-r8a73a4", "renesas,bsc",
435 			     "simple-pm-bus";
436 		#address-cells = <1>;
437 		#size-cells = <1>;
441 		power-domains = <&pd_c4>;
445 		#address-cells = <2>;
446 		#size-cells = <2>;
451 			compatible = "fixed-clock";
452 			#clock-cells = <0>;
454 			clock-frequency = <0>;
457 			compatible = "fixed-clock";
458 			#clock-cells = <0>;
460 			clock-frequency = <0>;
463 			compatible = "fixed-clock";
464 			#clock-cells = <0>;
466 			clock-frequency = <0>;
469 			compatible = "fixed-clock";
470 			#clock-cells = <0>;
472 			clock-frequency = <0>;
475 			compatible = "fixed-clock";
476 			#clock-cells = <0>;
478 			clock-frequency = <0>;
483 			compatible = "renesas,r8a73a4-cpg-clocks";
486 			#clock-cells = <1>;
487 			clock-output-names = "main", "pll0", "pll1", "pll2",
493 		/* Variable factor clocks (DIV6) */
495 			compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
499 			#clock-cells = <0>;
500 			clock-output-names = "zb";
503 			compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
507 			#clock-cells = <0>;
510 			compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
514 			#clock-cells = <0>;
517 			compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
521 			#clock-cells = <0>;
524 			compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
528 			#clock-cells = <0>;
531 			compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
535 			#clock-cells = <0>;
538 			compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
543 			#clock-cells = <0>;
546 			compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
551 			#clock-cells = <0>;
554 			compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
559 			#clock-cells = <0>;
562 			compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
567 			#clock-cells = <0>;
570 			compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
575 			#clock-cells = <0>;
578 			compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
582 			#clock-cells = <0>;
585 			compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
589 			#clock-cells = <0>;
592 			compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
596 			#clock-cells = <0>;
599 			compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
602 			#clock-cells = <0>;
605 			compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
609 			#clock-cells = <0>;
612 			compatible = "renesas,r8a73a4-div6-clock", "renesas,cpg-div6-clock";
616 			#clock-cells = <0>;
621 			compatible = "fixed-factor-clock";
623 			#clock-cells = <0>;
624 			clock-div = <2>;
625 			clock-mult = <1>;
628 			compatible = "fixed-factor-clock";
630 			#clock-cells = <0>;
631 			clock-div = <2>;
632 			clock-mult = <1>;
635 			compatible = "fixed-factor-clock";
637 			#clock-cells = <0>;
638 			clock-div = <2>;
639 			clock-mult = <1>;
642 			compatible = "fixed-factor-clock";
644 			#clock-cells = <0>;
645 			clock-div = <2>;
646 			clock-mult = <1>;
651 			compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks";
655 			#clock-cells = <1>;
656 			clock-indices = <
662 			clock-output-names =
667 			compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks";
675 			#clock-cells = <1>;
676 			clock-indices = <
684 			clock-output-names =
690 			compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks";
696 			#clock-cells = <1>;
697 			clock-indices = <
702 			clock-output-names =
703 				"irqc", "intc-sys", "iic5", "iic4", "iic3";
706 			compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks";
709 			#clock-cells = <1>;
710 			clock-indices = <
713 			clock-output-names =
723 	sysc: system-controller@e6180000 {
724 		compatible = "renesas,sysc-r8a73a4", "renesas,sysc-rmobile";
727 		pm-domains {
729 				#address-cells = <1>;
730 				#size-cells = <0>;
731 				#power-domain-cells = <0>;
735 					#address-cells = <1>;
736 					#size-cells = <0>;
737 					#power-domain-cells = <0>;
741 						#power-domain-cells = <0>;
746 						#power-domain-cells = <0>;
751 						#address-cells = <1>;
752 						#size-cells = <0>;
753 						#power-domain-cells = <0>;
757 							#power-domain-cells = <0>;
763 						#address-cells = <1>;
764 						#size-cells = <0>;
765 						#power-domain-cells = <0>;
769 							#power-domain-cells = <0>;
775 						#address-cells = <1>;
776 						#size-cells = <0>;
777 						#power-domain-cells = <0>;
781 							#power-domain-cells = <0>;
788 					#power-domain-cells = <0>;
793 					#power-domain-cells = <0>;
798 					#power-domain-cells = <0>;
803 					#address-cells = <1>;
804 					#size-cells = <0>;
805 					#power-domain-cells = <0>;
809 						#power-domain-cells = <0>;
815 					#power-domain-cells = <0>;
820 					#power-domain-cells = <0>;
825 					#address-cells = <1>;
826 					#size-cells = <0>;
827 					#power-domain-cells = <0>;
831 						#power-domain-cells = <0>;
836 						#power-domain-cells = <0>;
842 					#power-domain-cells = <0>;
847 					#address-cells = <1>;
848 					#size-cells = <0>;
849 					#power-domain-cells = <0>;
853 						#power-domain-cells = <0>;
858 						#power-domain-cells = <0>;