Lines Matching +full:0 +full:x0a600000
20 qcom,msm-id = <357 0x10000>, <368 0x10000>, <418 0x10000>;
25 reg = <0 0>;
31 #clock-cells = <0>;
38 #clock-cells = <0>;
44 #clock-cells = <0>;
51 #size-cells = <0>;
53 cpu0: cpu@0 {
56 reg = <0x0>;
108 reg = <0x8fc00000 0x80000>;
113 reg = <0x8fc80000 0x40000>;
118 reg = <0x8fcfd000 0x1000>;
123 reg = <0x8fd00000 0x100000>;
128 reg = <0x8fe00000 0x20000>;
133 reg = <0x8fe20000 0x20000>;
139 reg = <0x8fe40000 0xc0000>;
144 reg = <0x8ff00000 0x100000>;
149 reg = <0x90000000 0x500000>;
164 qcom,local-pid = <0>;
198 reg = <0x100000 0x1f0000>;
208 reg = <0x00831000 0x200>;
219 reg = <0x00ff4000 0x114>;
221 #phy-cells = <0>;
231 reg = <0x00ff6000 0x1c0>;
247 reg = <0x00ff6200 0x170>,
248 <0x00ff6400 0x200>,
249 <0x00ff6800 0x800>;
250 #phy-cells = <0>;
251 #clock-cells = <0>;
260 reg = <0x01100000 0x400000>;
267 reg = <0x09680000 0x40000>;
274 reg = <0x0162c000 0x31200>;
281 reg = <0x01b04000 0x1c000>;
286 qcom,ee = <0>;
293 reg = <0x01b30000 0x10000>;
295 #size-cells = <0>;
300 dmas = <&qpic_bam 0>,
309 reg = <0x01c00000 0x3000>,
310 <0x40000000 0xf1d>,
311 <0x40000f20 0xc8>,
312 <0x40001000 0x1000>,
313 <0x40100000 0x100000>;
320 linux,pci-domain = <0>;
321 bus-range = <0x00 0xff>;
327 ranges = <0x01000000 0x0 0x00000000 0x40200000 0x0 0x100000>,
328 <0x02000000 0x0 0x40300000 0x40300000 0x0 0x3fd00000>;
347 interrupt-map-mask = <0 0 0 0x7>;
348 interrupt-map = <0 0 0 1 &intc 0 141 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
349 <0 0 0 2 &intc 0 142 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
350 <0 0 0 3 &intc 0 143 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
351 <0 0 0 4 &intc 0 144 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
371 iommu-map = <0x0 &apps_smmu 0x0200 0x1>,
372 <0x100 &apps_smmu 0x0201 0x1>,
373 <0x200 &apps_smmu 0x0202 0x1>,
374 <0x300 &apps_smmu 0x0203 0x1>,
375 <0x400 &apps_smmu 0x0204 0x1>;
390 reg = <0x01c00000 0x3000>,
391 <0x40000000 0xf1d>,
392 <0x40000f20 0xc8>,
393 <0x40001000 0x1000>,
394 <0x40200000 0x100000>,
395 <0x01c03000 0x3000>;
403 qcom,perst-regs = <&tcsr 0xb258 0xb270>;
441 reg = <0x01c07000 0x1c4>;
463 reg = <0x01c06000 0x104>, /* tx0 */
464 <0x01c06200 0x328>, /* rx0 */
465 <0x01c07200 0x1e8>, /* pcs */
466 <0x01c06800 0x104>, /* tx1 */
467 <0x01c06a00 0x328>, /* rx1 */
468 <0x01c07600 0x800>; /* pcs_misc */
472 #phy-cells = <0>;
480 iommus = <&apps_smmu 0x5e0 0x0>,
481 <&apps_smmu 0x5e2 0x0>;
482 reg = <0x1e40000 0x7000>,
483 <0x1e50000 0x4b20>,
484 <0x1e04000 0x2c000>;
491 <&ipa_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
508 qcom,smem-states = <&ipa_smp2p_out 0>,
518 reg = <0x01f40000 0x40000>;
524 reg = <0x01fc0000 0x1000>;
529 reg = <0x08804000 0x1000>;
541 reg = <0x04080000 0x4040>;
544 <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
559 qcom,smem-states = <&modem_smp2p_out 0>;
574 reg = <0x0a6f8800 0x400>;
608 reg = <0x0a600000 0xcd00>;
610 iommus = <&apps_smmu 0x1a0 0x0>;
620 reg = <0x0b210000 0x30000>;
621 qcom,pdc-ranges = <0 179 52>;
629 reg = <0x0c264000 0x1000>;
634 reg = <0x0c440000 0x0000d00>,
635 <0x0c600000 0x2000000>,
636 <0x0e600000 0x0100000>,
637 <0x0e700000 0x00a0000>,
638 <0x0c40a000 0x0000700>;
642 qcom,ee = <0>;
643 qcom,channel = <0>;
645 #size-cells = <0>;
648 cell-index = <0>;
653 reg = <0xf100000 0x300000>;
659 gpio-ranges = <&tlmm 0 0 108>;
664 reg = <0x1468f000 0x1000>;
669 ranges = <0x0 0x1468f000 0x1000>;
673 reg = <0x94c 0x200>;
679 reg = <0x15000000 0x20000>;
706 reg = <0x17800000 0x1000>,
707 <0x17802000 0x1000>;
712 reg = <0x17808000 0x1000>;
715 #clock-cells = <0>;
720 reg = <0x17810000 0x2000>;
724 #clock-cells = <0>;
729 reg = <0x17817000 0x1000>;
738 reg = <0x17820000 0x1000>;
742 frame-number = <0>;
743 interrupts = <GIC_SPI 7 0x4>,
744 <GIC_SPI 6 0x4>;
745 reg = <0x17821000 0x1000>,
746 <0x17822000 0x1000>;
751 interrupts = <GIC_SPI 8 0x4>;
752 reg = <0x17823000 0x1000>;
758 interrupts = <GIC_SPI 9 0x4>;
759 reg = <0x17824000 0x1000>;
765 interrupts = <GIC_SPI 10 0x4>;
766 reg = <0x17825000 0x1000>;
772 interrupts = <GIC_SPI 11 0x4>;
773 reg = <0x17826000 0x1000>;
779 interrupts = <GIC_SPI 12 0x4>;
780 reg = <0x17827000 0x1000>;
786 interrupts = <GIC_SPI 13 0x4>;
787 reg = <0x17828000 0x1000>;
793 interrupts = <GIC_SPI 14 0x4>;
794 reg = <0x17829000 0x1000>;
801 reg = <0x17830000 0x10000>, <0x17840000 0x10000>;
802 reg-names = "drv-0", "drv-1";
805 qcom,tcs-offset = <0xd00>;