Lines Matching +full:rpm +full:- +full:msg +full:- +full:ram
1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interconnect/qcom,msm8974.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/qcom,gcc-msm8974.h>
7 #include <dt-bindings/clock/qcom,mmcc-msm8974.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-bindings/reset/qcom,gcc-msm8974.h>
10 #include <dt-bindings/gpio/gpio.h>
13 #address-cells = <1>;
14 #size-cells = <1>;
15 interrupt-parent = <&intc>;
19 compatible = "fixed-clock";
20 #clock-cells = <0>;
21 clock-frequency = <19200000>;
25 compatible = "fixed-clock";
26 #clock-cells = <0>;
27 clock-frequency = <32768>;
32 #address-cells = <1>;
33 #size-cells = <0>;
38 enable-method = "qcom,kpss-acc-v2";
41 next-level-cache = <&L2>;
44 cpu-idle-states = <&CPU_SPC>;
49 enable-method = "qcom,kpss-acc-v2";
52 next-level-cache = <&L2>;
55 cpu-idle-states = <&CPU_SPC>;
60 enable-method = "qcom,kpss-acc-v2";
63 next-level-cache = <&L2>;
66 cpu-idle-states = <&CPU_SPC>;
71 enable-method = "qcom,kpss-acc-v2";
74 next-level-cache = <&L2>;
77 cpu-idle-states = <&CPU_SPC>;
80 L2: l2-cache {
82 cache-level = <2>;
83 cache-unified;
87 idle-states {
89 compatible = "qcom,idle-state-spc",
90 "arm,idle-state";
91 entry-latency-us = <150>;
92 exit-latency-us = <200>;
93 min-residency-us = <2000>;
100 compatible = "qcom,scm-msm8974", "qcom,scm";
102 clock-names = "core", "bus", "iface";
112 compatible = "qcom,krait-pmu";
116 rpm: remoteproc { label
117 compatible = "qcom,msm8974-rpm-proc", "qcom,rpm-proc";
119 smd-edge {
122 qcom,smd-edge = <15>;
124 rpm_requests: rpm-requests {
125 compatible = "qcom,rpm-msm8974";
126 qcom,smd-channels = "rpm_requests";
128 rpmcc: clock-controller {
129 compatible = "qcom,rpmcc-msm8974", "qcom,rpmcc";
130 #clock-cells = <1>;
132 clock-names = "xo";
138 reserved-memory {
139 #address-cells = <1>;
140 #size-cells = <1>;
145 no-map;
150 no-map;
155 no-map;
160 no-map;
165 no-map;
170 no-map;
175 no-map;
180 no-map;
184 compatible = "qcom,rmtfs-mem";
186 no-map;
188 qcom,client-id = <1>;
195 memory-region = <&smem_region>;
196 qcom,rpm-msg-ram = <&rpm_msg_ram>;
201 smp2p-adsp {
205 interrupt-parent = <&intc>;
210 qcom,local-pid = <0>;
211 qcom,remote-pid = <2>;
213 adsp_smp2p_out: master-kernel {
214 qcom,entry-name = "master-kernel";
215 #qcom,smem-state-cells = <1>;
218 adsp_smp2p_in: slave-kernel {
219 qcom,entry-name = "slave-kernel";
221 interrupt-controller;
222 #interrupt-cells = <2>;
226 smp2p-modem {
230 interrupt-parent = <&intc>;
235 qcom,local-pid = <0>;
236 qcom,remote-pid = <1>;
238 modem_smp2p_out: master-kernel {
239 qcom,entry-name = "master-kernel";
240 #qcom,smem-state-cells = <1>;
243 modem_smp2p_in: slave-kernel {
244 qcom,entry-name = "slave-kernel";
246 interrupt-controller;
247 #interrupt-cells = <2>;
251 smp2p-wcnss {
255 interrupt-parent = <&intc>;
260 qcom,local-pid = <0>;
261 qcom,remote-pid = <4>;
263 wcnss_smp2p_out: master-kernel {
264 qcom,entry-name = "master-kernel";
266 #qcom,smem-state-cells = <1>;
269 wcnss_smp2p_in: slave-kernel {
270 qcom,entry-name = "slave-kernel";
272 interrupt-controller;
273 #interrupt-cells = <2>;
280 #address-cells = <1>;
281 #size-cells = <0>;
283 qcom,ipc-1 = <&apcs 8 13>;
284 qcom,ipc-2 = <&apcs 8 9>;
285 qcom,ipc-3 = <&apcs 8 19>;
290 #qcom,smem-state-cells = <1>;
297 interrupt-controller;
298 #interrupt-cells = <2>;
305 interrupt-controller;
306 #interrupt-cells = <2>;
313 interrupt-controller;
314 #interrupt-cells = <2>;
319 #address-cells = <1>;
320 #size-cells = <1>;
322 compatible = "simple-bus";
324 intc: interrupt-controller@f9000000 {
325 compatible = "qcom,msm-qgic2";
326 interrupt-controller;
327 #interrupt-cells = <3>;
338 #address-cells = <1>;
339 #size-cells = <1>;
341 compatible = "arm,armv7-timer-mem";
343 clock-frequency = <19200000>;
346 frame-number = <0>;
354 frame-number = <1>;
361 frame-number = <2>;
368 frame-number = <3>;
375 frame-number = <4>;
382 frame-number = <5>;
389 frame-number = <6>;
396 saw0: power-controller@f9089000 {
397 compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2";
401 saw1: power-controller@f9099000 {
402 compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2";
406 saw2: power-controller@f90a9000 {
407 compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2";
411 saw3: power-controller@f90b9000 {
412 compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2";
416 saw_l2: power-controller@f9012000 {
422 acc0: power-manager@f9088000 {
423 compatible = "qcom,kpss-acc-v2";
427 acc1: power-manager@f9098000 {
428 compatible = "qcom,kpss-acc-v2";
432 acc2: power-manager@f90a8000 {
433 compatible = "qcom,kpss-acc-v2";
437 acc3: power-manager@f90b8000 {
438 compatible = "qcom,kpss-acc-v2";
443 compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4";
445 reg-names = "hc", "core";
448 interrupt-names = "hc_irq", "pwr_irq";
452 clock-names = "iface", "core", "xo";
453 bus-width = <8>;
454 non-removable;
460 compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4";
462 reg-names = "hc", "core";
465 interrupt-names = "hc_irq", "pwr_irq";
469 clock-names = "iface", "core", "xo";
470 bus-width = <4>;
472 #address-cells = <1>;
473 #size-cells = <0>;
479 compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4";
481 reg-names = "hc", "core";
484 interrupt-names = "hc_irq", "pwr_irq";
488 clock-names = "iface", "core", "xo";
489 bus-width = <4>;
491 #address-cells = <1>;
492 #size-cells = <0>;
498 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
502 clock-names = "core", "iface";
507 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
511 clock-names = "core", "iface";
512 pinctrl-names = "default";
513 pinctrl-0 = <&blsp1_uart2_default>;
519 compatible = "qcom,i2c-qup-v2.1.1";
523 clock-names = "core", "iface";
524 pinctrl-names = "default", "sleep";
525 pinctrl-0 = <&blsp1_i2c1_default>;
526 pinctrl-1 = <&blsp1_i2c1_sleep>;
527 #address-cells = <1>;
528 #size-cells = <0>;
533 compatible = "qcom,i2c-qup-v2.1.1";
537 clock-names = "core", "iface";
538 pinctrl-names = "default", "sleep";
539 pinctrl-0 = <&blsp1_i2c2_default>;
540 pinctrl-1 = <&blsp1_i2c2_sleep>;
541 #address-cells = <1>;
542 #size-cells = <0>;
547 compatible = "qcom,i2c-qup-v2.1.1";
551 clock-names = "core", "iface";
552 pinctrl-names = "default", "sleep";
553 pinctrl-0 = <&blsp1_i2c3_default>;
554 pinctrl-1 = <&blsp1_i2c3_sleep>;
555 #address-cells = <1>;
556 #size-cells = <0>;
561 compatible = "qcom,i2c-qup-v2.1.1";
565 clock-names = "core", "iface";
566 pinctrl-names = "default", "sleep";
567 pinctrl-0 = <&blsp1_i2c6_default>;
568 pinctrl-1 = <&blsp1_i2c6_sleep>;
569 #address-cells = <1>;
570 #size-cells = <0>;
573 blsp2_dma: dma-controller@f9944000 {
574 compatible = "qcom,bam-v1.4.0";
578 clock-names = "bam_clk";
579 #dma-cells = <1>;
584 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
588 clock-names = "core", "iface";
589 pinctrl-names = "default", "sleep";
590 pinctrl-0 = <&blsp2_uart1_default>;
591 pinctrl-1 = <&blsp2_uart1_sleep>;
596 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
600 clock-names = "core", "iface";
605 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
609 clock-names = "core", "iface";
610 pinctrl-names = "default";
611 pinctrl-0 = <&blsp2_uart4_default>;
617 compatible = "qcom,i2c-qup-v2.1.1";
621 clock-names = "core", "iface";
622 pinctrl-names = "default", "sleep";
623 pinctrl-0 = <&blsp2_i2c2_default>;
624 pinctrl-1 = <&blsp2_i2c2_sleep>;
625 #address-cells = <1>;
626 #size-cells = <0>;
631 compatible = "qcom,i2c-qup-v2.1.1";
635 clock-names = "core", "iface";
637 dma-names = "tx", "rx";
638 pinctrl-names = "default", "sleep";
639 pinctrl-0 = <&blsp2_i2c5_default>;
640 pinctrl-1 = <&blsp2_i2c5_sleep>;
641 #address-cells = <1>;
642 #size-cells = <0>;
647 compatible = "qcom,i2c-qup-v2.1.1";
651 clock-names = "core", "iface";
652 pinctrl-names = "default", "sleep";
653 pinctrl-0 = <&blsp2_i2c6_default>;
654 pinctrl-1 = <&blsp2_i2c6_sleep>;
655 #address-cells = <1>;
656 #size-cells = <0>;
660 compatible = "qcom,ci-hdrc";
666 clock-names = "iface", "core";
667 assigned-clocks = <&gcc GCC_USB_HS_SYSTEM_CLK>;
668 assigned-clock-rates = <75000000>;
670 reset-names = "core";
673 ahb-burst-config = <0>;
674 phy-names = "usb-phy";
676 #reset-cells = <1>;
679 usb_hs1_phy: phy-0 {
680 compatible = "qcom,usb-hs-phy-msm8974",
681 "qcom,usb-hs-phy";
682 #phy-cells = <0>;
684 clock-names = "ref", "sleep";
686 reset-names = "phy", "por";
690 usb_hs2_phy: phy-1 {
691 compatible = "qcom,usb-hs-phy-msm8974",
692 "qcom,usb-hs-phy";
693 #phy-cells = <0>;
695 clock-names = "ref", "sleep";
697 reset-names = "phy", "por";
707 clock-names = "core";
711 compatible = "qcom,pronto-v2-pil", "qcom,pronto";
713 reg-names = "ccu", "dxe", "pmu";
715 memory-region = <&wcnss_region>;
717 interrupts-extended = <&intc GIC_SPI 149 IRQ_TYPE_EDGE_RISING>,
722 interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";
724 qcom,smem-states = <&wcnss_smp2p_out 0>;
725 qcom,smem-state-names = "stop";
733 clock-names = "xo";
736 smd-edge {
740 qcom,smd-edge = <6>;
744 qcom,smd-channels = "WCNSS_CTRL";
750 compatible = "qcom,wcnss-bt";
754 compatible = "qcom,wcnss-wlan";
758 interrupt-names = "tx", "rx";
760 qcom,smem-states = <&apps_smsm 10>, <&apps_smsm 9>;
761 qcom,smem-state-names = "tx-enable",
762 "tx-rings-empty";
769 compatible = "qcom,msm8974-rpm-stats";
774 compatible = "arm,coresight-tmc", "arm,primecell";
778 clock-names = "apb_pclk", "atclk";
780 out-ports {
783 remote-endpoint = <&replicator_in>;
788 in-ports {
791 remote-endpoint = <&merger_out>;
798 compatible = "arm,coresight-tpiu", "arm,primecell";
802 clock-names = "apb_pclk", "atclk";
804 in-ports {
807 remote-endpoint = <&replicator_out1>;
814 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
818 clock-names = "apb_pclk", "atclk";
820 in-ports {
821 #address-cells = <1>;
822 #size-cells = <0>;
826 * 0 - not-connected
827 * 1 - connected trought funnel to Multimedia CPU
828 * 2 - connected to Wireless CPU
829 * 3 - not-connected
830 * 4 - not-connected
831 * 6 - not-connected
832 * 7 - connected to STM
837 remote-endpoint = <&kpss_out>;
842 out-ports {
845 remote-endpoint = <&merger_in1>;
852 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
856 clock-names = "apb_pclk", "atclk";
858 in-ports {
859 #address-cells = <1>;
860 #size-cells = <0>;
864 * 0 - connected trought funnel to Audio, Modem and
866 * 2...7 - not-connected
871 remote-endpoint = <&funnel1_out>;
876 out-ports {
879 remote-endpoint = <&etf_in>;
886 compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
890 clock-names = "apb_pclk", "atclk";
892 out-ports {
893 #address-cells = <1>;
894 #size-cells = <0>;
899 remote-endpoint = <&etr_in>;
905 remote-endpoint = <&tpiu_in>;
910 in-ports {
913 remote-endpoint = <&etf_out>;
920 compatible = "arm,coresight-tmc", "arm,primecell";
924 clock-names = "apb_pclk", "atclk";
926 in-ports {
929 remote-endpoint = <&replicator_out0>;
936 compatible = "arm,coresight-etm4x", "arm,primecell";
940 clock-names = "apb_pclk", "atclk";
944 out-ports {
947 remote-endpoint = <&kpss_in0>;
954 compatible = "arm,coresight-etm4x", "arm,primecell";
958 clock-names = "apb_pclk", "atclk";
962 out-ports {
965 remote-endpoint = <&kpss_in1>;
972 compatible = "arm,coresight-etm4x", "arm,primecell";
976 clock-names = "apb_pclk", "atclk";
980 out-ports {
983 remote-endpoint = <&kpss_in2>;
990 compatible = "arm,coresight-etm4x", "arm,primecell";
994 clock-names = "apb_pclk", "atclk";
998 out-ports {
1001 remote-endpoint = <&kpss_in3>;
1009 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
1013 clock-names = "apb_pclk", "atclk";
1015 in-ports {
1016 #address-cells = <1>;
1017 #size-cells = <0>;
1022 remote-endpoint = <&etm0_out>;
1028 remote-endpoint = <&etm1_out>;
1034 remote-endpoint = <&etm2_out>;
1040 remote-endpoint = <&etm3_out>;
1045 out-ports {
1048 remote-endpoint = <&funnel1_in5>;
1054 gcc: clock-controller@fc400000 {
1055 compatible = "qcom,gcc-msm8974";
1056 #clock-cells = <1>;
1057 #reset-cells = <1>;
1058 #power-domain-cells = <1>;
1063 clock-names = "xo",
1068 compatible = "qcom,rpm-msg-ram";
1074 compatible = "qcom,msm8974-bimc";
1075 #interconnect-cells = <1>;
1076 clock-names = "bus", "bus_a";
1083 compatible = "qcom,msm8974-snoc";
1084 #interconnect-cells = <1>;
1085 clock-names = "bus", "bus_a";
1092 compatible = "qcom,msm8974-pnoc";
1093 #interconnect-cells = <1>;
1094 clock-names = "bus", "bus_a";
1101 compatible = "qcom,msm8974-ocmemnoc";
1102 #interconnect-cells = <1>;
1103 clock-names = "bus", "bus_a";
1110 compatible = "qcom,msm8974-mmssnoc";
1111 #interconnect-cells = <1>;
1112 clock-names = "bus", "bus_a";
1119 compatible = "qcom,msm8974-cnoc";
1120 #interconnect-cells = <1>;
1121 clock-names = "bus", "bus_a";
1126 tsens: thermal-sensor@fc4a9000 {
1127 compatible = "qcom,msm8974-tsens", "qcom,tsens-v0_1";
1130 nvmem-cells = <&tsens_mode>,
1157 nvmem-cell-names = "mode",
1186 interrupt-names = "uplow";
1187 #thermal-sensor-cells = <1>;
1196 compatible = "qcom,msm8974-qfprom", "qcom,qfprom";
1198 #address-cells = <1>;
1199 #size-cells = <1>;
1206 tsens_s0_p1: s0-p1@d1 {
1211 tsens_s1_p1: s1-p1@d2 {
1216 tsens_s2_p1: s2-p1@d2 {
1221 tsens_s3_p1: s3-p1@d3 {
1226 tsens_s4_p1: s4-p1@d4 {
1231 tsens_s5_p1: s5-p1@d4 {
1236 tsens_s6_p1: s6-p1@d5 {
1241 tsens_s7_p1: s7-p1@d6 {
1246 tsens_s8_p1: s8-p1@d7 {
1256 tsens_s9_p1: s9-p1@d8 {
1271 tsens_s0_p2: s0-p2@da {
1276 tsens_s1_p2: s1-p2@db {
1281 tsens_s2_p2: s2-p2@dc {
1286 tsens_s3_p2: s3-p2@dc {
1291 tsens_s4_p2: s4-p2@dd {
1296 tsens_s5_p2: s5-p2@de {
1301 tsens_s6_p2: s6-p2@df {
1306 tsens_s7_p2: s7-p2@e0 {
1311 tsens_s8_p2: s8-p2@e0 {
1316 tsens_s9_p2: s9-p2@e1 {
1326 tsens_s5_p2_backup: s5-p2_backup@e3 {
1336 tsens_s6_p2_backup: s6-p2_backup@e4 {
1341 tsens_s7_p2_backup: s7-p2_backup@e4 {
1346 tsens_s8_p2_backup: s8-p2_backup@e5 {
1351 tsens_s9_p2_backup: s9-p2_backup@e6 {
1366 tsens_s0_p1_backup: s0-p1_backup@441 {
1371 tsens_s1_p1_backup: s1-p1_backup@442 {
1376 tsens_s2_p1_backup: s2-p1_backup@442 {
1381 tsens_s3_p1_backup: s3-p1_backup@443 {
1386 tsens_s4_p1_backup: s4-p1_backup@444 {
1391 tsens_s5_p1_backup: s5-p1_backup@444 {
1396 tsens_s6_p1_backup: s6-p1_backup@445 {
1401 tsens_s7_p1_backup: s7-p1_backup@446 {
1411 tsens_s8_p1_backup: s8-p1_backup@448 {
1416 tsens_s9_p1_backup: s9-p1_backup@448 {
1431 tsens_s0_p2_backup: s0-p2_backup@44b {
1436 tsens_s1_p2_backup: s1-p2_backup@44c {
1441 tsens_s2_p2_backup: s2-p2_backup@44c {
1446 tsens_s3_p2_backup: s3-p2_backup@44d {
1451 tsens_s4_p2_backup: s4-p2_backup@44e {
1458 compatible = "qcom,spmi-pmic-arb";
1459 reg-names = "core", "intr", "cnfg";
1463 interrupt-names = "periph_irq";
1467 #address-cells = <2>;
1468 #size-cells = <0>;
1469 interrupt-controller;
1470 #interrupt-cells = <4>;
1473 bam_dmux_dma: dma-controller@fc834000 {
1474 compatible = "qcom,bam-v1.4.0";
1477 #dma-cells = <1>;
1480 num-channels = <6>;
1481 qcom,num-ees = <1>;
1482 qcom,powered-remotely;
1486 compatible = "qcom,msm8974-mss-pil";
1488 reg-names = "qdsp6", "rmb";
1490 interrupts-extended = <&intc GIC_SPI 24 IRQ_TYPE_EDGE_RISING>,
1495 interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";
1501 clock-names = "iface", "bus", "mem", "xo";
1504 reset-names = "mss_restart";
1506 qcom,halt-regs = <&tcsr_mutex 0x1180 0x1200 0x1280>;
1508 qcom,smem-states = <&modem_smp2p_out 0>;
1509 qcom,smem-state-names = "stop";
1514 memory-region = <&mba_region>;
1518 memory-region = <&mpss_region>;
1521 bam_dmux: bam-dmux {
1522 compatible = "qcom,bam-dmux";
1524 interrupt-parent = <&modem_smsm>;
1526 interrupt-names = "pc", "pc-ack";
1528 qcom,smem-states = <&apps_smsm 1>, <&apps_smsm 11>;
1529 qcom,smem-state-names = "pc", "pc-ack";
1532 dma-names = "tx", "rx";
1535 smd-edge {
1539 qcom,smd-edge = <0>;
1546 compatible = "qcom,msm8974-tcsr-mutex", "qcom,tcsr-mutex", "syscon";
1548 #hwlock-cells = <1>;
1552 compatible = "qcom,tcsr-msm8974", "syscon";
1557 compatible = "qcom,msm8974-pinctrl";
1559 gpio-controller;
1560 gpio-ranges = <&tlmm 0 0 146>;
1561 #gpio-cells = <2>;
1562 interrupt-controller;
1563 #interrupt-cells = <2>;
1566 sdc1_off: sdc1-off-state {
1567 clk-pins {
1569 bias-disable;
1570 drive-strength = <2>;
1573 cmd-pins {
1575 bias-pull-up;
1576 drive-strength = <2>;
1579 data-pins {
1581 bias-pull-up;
1582 drive-strength = <2>;
1586 sdc2_off: sdc2-off-state {
1587 clk-pins {
1589 bias-disable;
1590 drive-strength = <2>;
1593 cmd-pins {
1595 bias-pull-up;
1596 drive-strength = <2>;
1599 data-pins {
1601 bias-pull-up;
1602 drive-strength = <2>;
1605 cd-pins {
1608 bias-disable;
1609 drive-strength = <2>;
1613 blsp1_uart2_default: blsp1-uart2-default-state {
1614 rx-pins {
1617 drive-strength = <2>;
1618 bias-pull-up;
1621 tx-pins {
1624 drive-strength = <4>;
1625 bias-disable;
1629 blsp2_uart1_default: blsp2-uart1-default-state {
1630 tx-rts-pins {
1633 drive-strength = <2>;
1634 bias-disable;
1637 rx-cts-pins {
1640 drive-strength = <2>;
1641 bias-pull-up;
1645 blsp2_uart1_sleep: blsp2-uart1-sleep-state {
1648 drive-strength = <2>;
1649 bias-pull-down;
1652 blsp2_uart4_default: blsp2-uart4-default-state {
1653 tx-rts-pins {
1656 drive-strength = <2>;
1657 bias-disable;
1660 rx-cts-pins {
1663 drive-strength = <2>;
1664 bias-pull-up;
1668 blsp1_i2c1_default: blsp1-i2c1-default-state {
1671 drive-strength = <2>;
1672 bias-disable;
1675 blsp1_i2c1_sleep: blsp1-i2c1-sleep-state {
1678 drive-strength = <2>;
1679 bias-pull-up;
1682 blsp1_i2c2_default: blsp1-i2c2-default-state {
1685 drive-strength = <2>;
1686 bias-disable;
1689 blsp1_i2c2_sleep: blsp1-i2c2-sleep-state {
1692 drive-strength = <2>;
1693 bias-pull-up;
1696 blsp1_i2c3_default: blsp1-i2c3-default-state {
1699 drive-strength = <2>;
1700 bias-disable;
1703 blsp1_i2c3_sleep: blsp1-i2c3-sleep-state {
1706 drive-strength = <2>;
1707 bias-pull-up;
1714 blsp1_i2c6_default: blsp1-i2c6-default-state {
1717 drive-strength = <2>;
1718 bias-disable;
1721 blsp1_i2c6_sleep: blsp1-i2c6-sleep-state {
1724 drive-strength = <2>;
1725 bias-pull-up;
1731 blsp2_i2c2_default: blsp2-i2c2-default-state {
1734 drive-strength = <2>;
1735 bias-disable;
1738 blsp2_i2c2_sleep: blsp2-i2c2-sleep-state {
1741 drive-strength = <2>;
1742 bias-pull-up;
1749 blsp2_i2c5_default: blsp2-i2c5-default-state {
1752 drive-strength = <2>;
1753 bias-disable;
1756 blsp2_i2c5_sleep: blsp2-i2c5-sleep-state {
1759 drive-strength = <2>;
1760 bias-pull-up;
1763 blsp2_i2c6_default: blsp2-i2c6-default-state {
1766 drive-strength = <2>;
1767 bias-disable;
1770 blsp2_i2c6_sleep: blsp2-i2c6-sleep-state {
1773 drive-strength = <2>;
1774 bias-pull-up;
1777 cci_default: cci-default-state {
1778 cci_i2c0_default: cci-i2c0-default-pins {
1781 drive-strength = <2>;
1782 bias-disable;
1785 cci_i2c1_default: cci-i2c1-default-pins {
1788 drive-strength = <2>;
1789 bias-disable;
1793 cci_sleep: cci-sleep-state {
1794 cci_i2c0_sleep: cci-i2c0-sleep-pins {
1797 drive-strength = <2>;
1798 bias-disable;
1801 cci_i2c1_sleep: cci-i2c1-sleep-pins {
1804 drive-strength = <2>;
1805 bias-disable;
1809 spi8_default: spi8_default-state {
1810 mosi-pins {
1814 miso-pins {
1818 cs-pins {
1822 clk-pins {
1829 mmcc: clock-controller@fd8c0000 {
1830 compatible = "qcom,mmcc-msm8974";
1831 #clock-cells = <1>;
1832 #reset-cells = <1>;
1833 #power-domain-cells = <1>;
1847 clock-names = "xo",
1861 mdss: display-subsystem@fd900000 {
1864 reg-names = "mdss_phys", "vbif_phys";
1866 power-domains = <&mmcc MDSS_GDSC>;
1871 clock-names = "iface", "bus", "vsync";
1875 interrupt-controller;
1876 #interrupt-cells = <1>;
1880 #address-cells = <1>;
1881 #size-cells = <1>;
1884 mdp: display-controller@fd900000 {
1885 compatible = "qcom,msm8974-mdp5", "qcom,mdp5";
1887 reg-names = "mdp_phys";
1889 interrupt-parent = <&mdss>;
1896 clock-names = "iface", "bus", "core", "vsync";
1899 interconnect-names = "mdp0-mem";
1902 #address-cells = <1>;
1903 #size-cells = <0>;
1908 remote-endpoint = <&mdss_dsi0_in>;
1915 remote-endpoint = <&mdss_dsi1_in>;
1922 compatible = "qcom,msm8974-dsi-ctrl",
1923 "qcom,mdss-dsi-ctrl";
1925 reg-names = "dsi_ctrl";
1927 interrupt-parent = <&mdss>;
1930 assigned-clocks = <&mmcc BYTE0_CLK_SRC>, <&mmcc PCLK0_CLK_SRC>;
1931 assigned-clock-parents = <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>;
1940 clock-names = "mdp_core",
1952 #address-cells = <1>;
1953 #size-cells = <0>;
1956 #address-cells = <1>;
1957 #size-cells = <0>;
1962 remote-endpoint = <&mdp5_intf1_out>;
1975 compatible = "qcom,dsi-phy-28nm-hpm";
1979 reg-names = "dsi_pll",
1983 #clock-cells = <1>;
1984 #phy-cells = <0>;
1987 clock-names = "iface", "ref";
1993 compatible = "qcom,msm8974-dsi-ctrl",
1994 "qcom,mdss-dsi-ctrl";
1996 reg-names = "dsi_ctrl";
1998 interrupt-parent = <&mdss>;
2001 assigned-clocks = <&mmcc BYTE1_CLK_SRC>, <&mmcc PCLK1_CLK_SRC>;
2002 assigned-clock-parents = <&mdss_dsi1_phy 0>, <&mdss_dsi1_phy 1>;
2011 clock-names = "mdp_core",
2023 #address-cells = <1>;
2024 #size-cells = <0>;
2027 #address-cells = <1>;
2028 #size-cells = <0>;
2033 remote-endpoint = <&mdp5_intf2_out>;
2046 compatible = "qcom,dsi-phy-28nm-hpm";
2050 reg-names = "dsi_pll",
2054 #clock-cells = <1>;
2055 #phy-cells = <0>;
2058 clock-names = "iface", "ref";
2065 compatible = "qcom,msm8974-cci";
2066 #address-cells = <1>;
2067 #size-cells = <0>;
2073 clock-names = "camss_top_ahb",
2077 pinctrl-names = "default", "sleep";
2078 pinctrl-0 = <&cci_default>;
2079 pinctrl-1 = <&cci_sleep>;
2083 cci_i2c0: i2c-bus@0 {
2085 clock-frequency = <100000>;
2086 #address-cells = <1>;
2087 #size-cells = <0>;
2090 cci_i2c1: i2c-bus@1 {
2092 clock-frequency = <100000>;
2093 #address-cells = <1>;
2094 #size-cells = <0>;
2099 compatible = "qcom,adreno-330.1", "qcom,adreno";
2101 reg-names = "kgsl_3d0_reg_memory";
2104 interrupt-names = "kgsl_3d0_irq";
2109 clock-names = "core", "iface", "mem_iface";
2112 power-domains = <&mmcc OXILICX_GDSC>;
2113 operating-points-v2 = <&gpu_opp_table>;
2117 interconnect-names = "gfx-mem", "ocmem";
2123 gpu_opp_table: opp-table {
2124 compatible = "operating-points-v2";
2126 opp-320000000 {
2127 opp-hz = /bits/ 64 <320000000>;
2130 opp-200000000 {
2131 opp-hz = /bits/ 64 <200000000>;
2134 opp-27000000 {
2135 opp-hz = /bits/ 64 <27000000>;
2141 compatible = "qcom,msm8974-ocmem";
2144 reg-names = "ctrl", "mem";
2148 clock-names = "core", "iface";
2150 #address-cells = <1>;
2151 #size-cells = <1>;
2153 gmu_sram: gmu-sram@0 {
2159 compatible = "qcom,msm8974-adsp-pil";
2162 interrupts-extended = <&intc GIC_SPI 162 IRQ_TYPE_EDGE_RISING>,
2167 interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";
2170 clock-names = "xo";
2172 memory-region = <&adsp_region>;
2174 qcom,smem-states = <&adsp_smp2p_out 0>;
2175 qcom,smem-state-names = "stop";
2179 smd-edge {
2183 qcom,smd-edge = <1>;
2189 compatible = "qcom,msm8974-imem", "syscon", "simple-mfd";
2192 reboot-mode {
2193 compatible = "syscon-reboot-mode";
2199 thermal-zones {
2200 cpu0-thermal {
2201 polling-delay-passive = <250>;
2202 polling-delay = <1000>;
2204 thermal-sensors = <&tsens 5>;
2220 cpu1-thermal {
2221 polling-delay-passive = <250>;
2222 polling-delay = <1000>;
2224 thermal-sensors = <&tsens 6>;
2240 cpu2-thermal {
2241 polling-delay-passive = <250>;
2242 polling-delay = <1000>;
2244 thermal-sensors = <&tsens 7>;
2260 cpu3-thermal {
2261 polling-delay-passive = <250>;
2262 polling-delay = <1000>;
2264 thermal-sensors = <&tsens 8>;
2280 q6-dsp-thermal {
2281 polling-delay-passive = <250>;
2282 polling-delay = <1000>;
2284 thermal-sensors = <&tsens 1>;
2287 q6_dsp_alert0: trip-point0 {
2295 modemtx-thermal {
2296 polling-delay-passive = <250>;
2297 polling-delay = <1000>;
2299 thermal-sensors = <&tsens 2>;
2302 modemtx_alert0: trip-point0 {
2310 video-thermal {
2311 polling-delay-passive = <250>;
2312 polling-delay = <1000>;
2314 thermal-sensors = <&tsens 3>;
2317 video_alert0: trip-point0 {
2325 wlan-thermal {
2326 polling-delay-passive = <250>;
2327 polling-delay = <1000>;
2329 thermal-sensors = <&tsens 4>;
2332 wlan_alert0: trip-point0 {
2340 gpu-top-thermal {
2341 polling-delay-passive = <250>;
2342 polling-delay = <1000>;
2344 thermal-sensors = <&tsens 9>;
2347 gpu1_alert0: trip-point0 {
2355 gpu-bottom-thermal {
2356 polling-delay-passive = <250>;
2357 polling-delay = <1000>;
2359 thermal-sensors = <&tsens 10>;
2362 gpu2_alert0: trip-point0 {
2372 compatible = "arm,armv7-timer";
2377 clock-frequency = <19200000>;
2380 vreg_boost: vreg-boost {
2381 compatible = "regulator-fixed";
2383 regulator-name = "vreg-boost";
2384 regulator-min-microvolt = <3150000>;
2385 regulator-max-microvolt = <3150000>;
2387 regulator-always-on;
2388 regulator-boot-on;
2391 enable-active-high;
2393 pinctrl-names = "default";
2394 pinctrl-0 = <&boost_bypass_n_pin>;
2397 vreg_vph_pwr: vreg-vph-pwr {
2398 compatible = "regulator-fixed";
2399 regulator-name = "vph-pwr";
2401 regulator-min-microvolt = <3600000>;
2402 regulator-max-microvolt = <3600000>;
2404 regulator-always-on;