Lines Matching +full:0 +full:x0200a000
20 #size-cells = <0>;
21 interrupts = <GIC_PPI 14 0x304>;
23 cpu@0 {
27 reg = <0>;
52 reg = <0x0 0x0>;
57 interrupts = <GIC_PPI 10 0x304>;
64 #clock-cells = <0>;
71 #clock-cells = <0>;
78 #clock-cells = <0>;
103 reg = <0x02000000 0x1000>,
104 <0x02002000 0x1000>;
110 interrupts = <GIC_PPI 1 0x301>,
111 <GIC_PPI 2 0x301>,
112 <GIC_PPI 3 0x301>;
113 reg = <0x0200a000 0x100>;
115 cpu-offset = <0x80000>;
121 gpio-ranges = <&msmgpio 0 0 152>;
126 reg = <0x800000 0x4000>;
134 reg = <0x900000 0x4000>;
143 reg = <0x28000000 0x1000>;
148 <0>,
149 <0>, <0>,
150 <0>, <0>,
151 <0>;
164 reg = <0x4000000 0x1000>;
171 <0>,
172 <0>,
173 <0>,
174 <0>,
175 <0>;
188 reg = <0x2011000 0x1000>;
191 #clock-cells = <0>;
196 reg = <0x108000 0x1000>;
197 qcom,ipc = <&l2cc 0x8 2>;
211 reg = <0x02088000 0x1000>, <0x02008000 0x1000>;
215 #clock-cells = <0>;
220 reg = <0x02098000 0x1000>, <0x02008000 0x1000>;
224 #clock-cells = <0>;
229 reg = <0x02089000 0x1000>, <0x02009000 0x1000>;
235 reg = <0x02099000 0x1000>, <0x02009000 0x1000>;
242 reg = <0x16400000 0x100>;
253 reg = <0x16440000 0x1000>,
254 <0x16400000 0x1000>;
264 reg = <0x500000 0x1000>;
274 #size-cells = <0>;
278 reg = <0x1c>;
288 reg = <0x148>;
301 reg = <0x11d>;
309 reg = <0x1a500000 0x200>;
316 arm,primecell-periphid = <0x00051180>;
318 reg = <0x12180000 0x8000>;
333 arm,primecell-periphid = <0x00051180>;
334 reg = <0x12400000 0x8000>;
348 reg = <0x1a400000 0x100>;
354 reg = <0x16000000 0x100>;
364 #size-cells = <0>;
365 reg = <0x16080000 0x1000>;
367 cs-gpios = <&msmgpio 8 0>;
377 reg = <0x12500000 0x200>,
378 <0x12500200 0x200>;
387 ahb-burst-config = <0>;
399 resets = <&usb1 0>;
401 #phy-cells = <0>;