Lines Matching +full:tcsr +full:- +full:msm8960
1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
9 /dts-v1/;
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/clock/qcom,gcc-mdm9615.h>
13 #include <dt-bindings/clock/qcom,lcc-msm8960.h>
14 #include <dt-bindings/reset/qcom,gcc-mdm9615.h>
15 #include <dt-bindings/mfd/qcom-rpm.h>
16 #include <dt-bindings/soc/qcom,gsbi.h>
19 #address-cells = <1>;
20 #size-cells = <1>;
23 interrupt-parent = <&intc>;
26 #address-cells = <1>;
27 #size-cells = <0>;
30 compatible = "arm,cortex-a5";
33 next-level-cache = <&L2>;
37 cpu-pmu {
38 compatible = "arm,cortex-a5-pmu";
44 compatible = "fixed-clock";
45 #clock-cells = <0>;
46 clock-frequency = <19200000>;
50 vsdcc_fixed: vsdcc-regulator {
51 compatible = "regulator-fixed";
52 regulator-name = "SDCC Power";
53 regulator-min-microvolt = <2700000>;
54 regulator-max-microvolt = <2700000>;
55 regulator-always-on;
59 #address-cells = <1>;
60 #size-cells = <1>;
62 compatible = "simple-bus";
64 L2: cache-controller@2040000 {
65 compatible = "arm,pl310-cache";
67 arm,data-latency = <2 2 0>;
68 cache-unified;
69 cache-level = <2>;
72 intc: interrupt-controller@2000000 {
73 compatible = "qcom,msm-qgic2";
74 interrupt-controller;
75 #interrupt-cells = <3>;
81 compatible = "qcom,kpss-wdt-mdm9615", "qcom,kpss-timer",
82 "qcom,msm-timer";
87 clock-frequency = <27000000>;
88 cpu-offset = <0x80000>;
92 compatible = "qcom,mdm9615-pinctrl";
93 gpio-controller;
94 gpio-ranges = <&msmgpio 0 0 88>;
95 #gpio-cells = <2>;
97 interrupt-controller;
98 #interrupt-cells = <2>;
102 gcc: clock-controller@900000 {
103 compatible = "qcom,gcc-mdm9615";
104 #clock-cells = <1>;
105 #power-domain-cells = <1>;
106 #reset-cells = <1>;
112 lcc: clock-controller@28000000 {
113 compatible = "qcom,lcc-mdm9615";
115 #clock-cells = <1>;
116 #reset-cells = <1>;
123 clock-names = "cxo",
133 l2cc: clock-controller@2011000 {
134 compatible = "qcom,kpss-gcc-mdm9615", "qcom,kpss-gcc", "syscon";
142 clock-names = "core";
143 assigned-clocks = <&gcc PRNG_CLK>;
144 assigned-clock-rates = <32000000>;
148 compatible = "qcom,gsbi-v1.0.0";
149 cell-index = <2>;
152 clock-names = "iface";
154 #address-cells = <1>;
155 #size-cells = <1>;
159 compatible = "qcom,i2c-qup-v1.1.1";
160 #address-cells = <1>;
161 #size-cells = <0>;
166 clock-names = "core", "iface";
172 compatible = "qcom,gsbi-v1.0.0";
173 cell-index = <3>;
176 clock-names = "iface";
178 #address-cells = <1>;
179 #size-cells = <1>;
183 compatible = "qcom,spi-qup-v1.1.1";
184 #address-cells = <1>;
185 #size-cells = <0>;
190 clock-names = "core", "iface";
196 compatible = "qcom,gsbi-v1.0.0";
197 cell-index = <4>;
200 clock-names = "iface";
202 #address-cells = <1>;
203 #size-cells = <1>;
206 syscon-tcsr = <&tcsr>;
209 compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
214 clock-names = "core", "iface";
220 compatible = "qcom,gsbi-v1.0.0";
221 cell-index = <5>;
224 clock-names = "iface";
226 #address-cells = <1>;
227 #size-cells = <1>;
230 syscon-tcsr = <&tcsr>;
233 compatible = "qcom,i2c-qup-v1.1.1";
234 #address-cells = <1>;
235 #size-cells = <0>;
240 assigned-clocks = <&gcc GSBI5_QUP_CLK>;
241 assigned-clock-rates = <24000000>;
244 clock-names = "core", "iface";
249 compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
254 clock-names = "core", "iface";
262 qcom,controller-type = "pmic-arbiter";
267 #interrupt-cells = <2>;
268 interrupt-controller;
269 #address-cells = <1>;
270 #size-cells = <0>;
273 compatible = "qcom,pm8018-pwrkey", "qcom,pm8921-pwrkey";
275 interrupt-parent = <&pm8018>;
279 pull-up;
283 compatible = "qcom,pm8018-mpp", "qcom,ssbi-mpp";
284 interrupt-controller;
285 #interrupt-cells = <2>;
287 gpio-controller;
288 #gpio-cells = <2>;
289 gpio-ranges = <&pm8018_mpps 0 0 6>;
293 compatible = "qcom,pm8018-rtc", "qcom,pm8921-rtc";
294 interrupt-parent = <&pm8018>;
297 allow-set-time;
301 compatible = "qcom,pm8018-gpio", "qcom,ssbi-gpio";
303 interrupt-controller;
304 #interrupt-cells = <2>;
305 gpio-controller;
306 gpio-ranges = <&pm8018_gpio 0 0 6>;
307 #gpio-cells = <2>;
312 sdcc1bam: dma-controller@12182000 {
313 compatible = "qcom,bam-v1.3.0";
317 clock-names = "bam_clk";
318 #dma-cells = <1>;
322 sdcc2bam: dma-controller@12142000 {
323 compatible = "qcom,bam-v1.3.0";
327 clock-names = "bam_clk";
328 #dma-cells = <1>;
335 arm,primecell-periphid = <0x00051180>;
339 clock-names = "mclk", "apb_pclk";
340 bus-width = <8>;
341 max-frequency = <48000000>;
342 cap-sd-highspeed;
343 cap-mmc-highspeed;
344 vmmc-supply = <&vsdcc_fixed>;
346 dma-names = "tx", "rx";
347 assigned-clocks = <&gcc SDC1_CLK>;
348 assigned-clock-rates = <400000>;
353 arm,primecell-periphid = <0x00051180>;
358 clock-names = "mclk", "apb_pclk";
359 bus-width = <4>;
360 cap-sd-highspeed;
361 cap-mmc-highspeed;
362 max-frequency = <48000000>;
363 no-1-8-v;
364 vmmc-supply = <&vsdcc_fixed>;
366 dma-names = "tx", "rx";
367 assigned-clocks = <&gcc SDC2_CLK>;
368 assigned-clock-rates = <400000>;
371 tcsr: syscon@1a400000 { label
372 compatible = "qcom,tcsr-mdm9615", "syscon";
377 compatible = "qcom,rpm-mdm9615";
385 interrupt-names = "ack", "err", "wakeup";
388 compatible = "qcom,rpm-pm8018-regulators";
390 vin_lvs1-supply = <&pm8018_s3>;
392 vdd_l7-supply = <&pm8018_s4>;
393 vdd_l8-supply = <&pm8018_s3>;
394 vdd_l9_l10_l11_l12-supply = <&pm8018_s5>;
398 regulator-min-microvolt = <500000>;
399 regulator-max-microvolt = <1150000>;
400 qcom,switch-mode-frequency = <1600000>;
401 bias-pull-down;
405 regulator-min-microvolt = <1225000>;
406 regulator-max-microvolt = <1300000>;
407 qcom,switch-mode-frequency = <1600000>;
408 bias-pull-down;
412 regulator-always-on;
413 regulator-min-microvolt = <1800000>;
414 regulator-max-microvolt = <1800000>;
415 qcom,switch-mode-frequency = <1600000>;
416 bias-pull-down;
420 regulator-min-microvolt = <2100000>;
421 regulator-max-microvolt = <2200000>;
422 qcom,switch-mode-frequency = <1600000>;
423 bias-pull-down;
427 regulator-always-on;
428 regulator-min-microvolt = <1350000>;
429 regulator-max-microvolt = <1350000>;
430 qcom,switch-mode-frequency = <1600000>;
431 bias-pull-down;
436 regulator-always-on;
437 regulator-min-microvolt = <1800000>;
438 regulator-max-microvolt = <1800000>;
439 bias-pull-down;
443 regulator-always-on;
444 regulator-min-microvolt = <1800000>;
445 regulator-max-microvolt = <1800000>;
446 bias-pull-down;
450 regulator-min-microvolt = <3300000>;
451 regulator-max-microvolt = <3300000>;
452 bias-pull-down;
456 regulator-min-microvolt = <2850000>;
457 regulator-max-microvolt = <2850000>;
458 bias-pull-down;
462 regulator-min-microvolt = <1800000>;
463 regulator-max-microvolt = <2850000>;
464 bias-pull-down;
468 regulator-min-microvolt = <1850000>;
469 regulator-max-microvolt = <1900000>;
470 bias-pull-down;
474 regulator-min-microvolt = <1200000>;
475 regulator-max-microvolt = <1200000>;
476 bias-pull-down;
480 regulator-min-microvolt = <750000>;
481 regulator-max-microvolt = <1150000>;
482 bias-pull-down;
486 regulator-min-microvolt = <1050000>;
487 regulator-max-microvolt = <1050000>;
488 bias-pull-down;
492 regulator-min-microvolt = <1050000>;
493 regulator-max-microvolt = <1050000>;
494 bias-pull-down;
498 regulator-min-microvolt = <1050000>;
499 regulator-max-microvolt = <1050000>;
500 bias-pull-down;
504 regulator-min-microvolt = <1850000>;
505 regulator-max-microvolt = <2950000>;
506 bias-pull-down;
510 regulator-min-microvolt = <2850000>;
511 regulator-max-microvolt = <2850000>;
512 bias-pull-down;
517 bias-pull-down;