Lines Matching full:mmcc
7 #include <dt-bindings/clock/qcom,mmcc-msm8960.h>
846 mmcc: clock-controller@4000000 { label
847 compatible = "qcom,mmcc-apq8064";
1180 <&mmcc GFX3D_CLK>,
1181 <&mmcc GFX3D_AHB_CLK>,
1182 <&mmcc GFX3D_AXI_CLK>,
1183 <&mmcc MMSS_IMEM_AHB_CLK>;
1280 clocks = <&mmcc DSI_M_AHB_CLK>,
1281 <&mmcc DSI_S_AHB_CLK>,
1282 <&mmcc AMP_AHB_CLK>,
1283 <&mmcc DSI_CLK>,
1284 <&mmcc DSI1_BYTE_CLK>,
1285 <&mmcc DSI_PIXEL_CLK>,
1286 <&mmcc DSI1_ESC_CLK>;
1291 assigned-clocks = <&mmcc DSI1_BYTE_SRC>,
1292 <&mmcc DSI1_ESC_SRC>,
1293 <&mmcc DSI_SRC>,
1294 <&mmcc DSI_PIXEL_SRC>;
1332 clocks = <&mmcc DSI_M_AHB_CLK>,
1343 clocks = <&mmcc DSI2_M_AHB_CLK>,
1344 <&mmcc DSI2_S_AHB_CLK>,
1345 <&mmcc AMP_AHB_CLK>,
1346 <&mmcc DSI2_CLK>,
1347 <&mmcc DSI2_BYTE_CLK>,
1348 <&mmcc DSI2_PIXEL_CLK>,
1349 <&mmcc DSI2_ESC_CLK>;
1358 assigned-clocks = <&mmcc DSI2_BYTE_SRC>,
1359 <&mmcc DSI2_ESC_SRC>,
1360 <&mmcc DSI2_SRC>,
1361 <&mmcc DSI2_PIXEL_SRC>;
1404 clocks = <&mmcc DSI2_M_AHB_CLK>,
1419 <&mmcc SMMU_AHB_CLK>,
1420 <&mmcc MDP_AXI_CLK>;
1435 <&mmcc SMMU_AHB_CLK>,
1436 <&mmcc MDP_AXI_CLK>;
1451 <&mmcc SMMU_AHB_CLK>,
1452 <&mmcc GFX3D_AXI_CLK>;
1467 <&mmcc SMMU_AHB_CLK>,
1468 <&mmcc GFX3D_AXI_CLK>;
1519 clocks = <&mmcc HDMI_APP_CLK>,
1520 <&mmcc HDMI_M_AHB_CLK>,
1521 <&mmcc HDMI_S_AHB_CLK>;
1555 clocks = <&mmcc HDMI_S_AHB_CLK>;
1567 clocks = <&mmcc MDP_CLK>,
1568 <&mmcc MDP_AHB_CLK>,
1569 <&mmcc MDP_AXI_CLK>,
1570 <&mmcc MDP_LUT_CLK>,
1571 <&mmcc HDMI_TV_CLK>,
1572 <&mmcc MDP_TV_CLK>;