Lines Matching +full:0 +full:x40018000
33 #clock-cells = <0>;
39 #clock-cells = <0>;
46 offset = <0x0>;
47 mask = <0x1000>;
66 reg = <0x40000000 0x00070000>;
71 reg = <0x40001000 0x800>;
76 reg = <0x40001800 0x400>;
85 reg = <0x40018000 0x2000>,
86 <0x40024000 0x1000>,
87 <0x40025000 0x1000>;
100 reg = <0x40020000 0x4000>;
110 reg = <0x40027000 0x1000>;
114 dmas = <&edma0 0 2>,
115 <&edma0 0 3>;
122 reg = <0x40028000 0x1000>;
126 dmas = <&edma0 0 4>,
127 <&edma0 0 5>;
134 reg = <0x40029000 0x1000>;
138 dmas = <&edma0 0 6>,
139 <&edma0 0 7>;
146 reg = <0x4002a000 0x1000>;
150 dmas = <&edma0 0 8>,
151 <&edma0 0 9>;
158 #size-cells = <0>;
160 reg = <0x4002c000 0x1000>;
173 #size-cells = <0>;
175 reg = <0x4002d000 0x1000>;
188 reg = <0x4002f000 0x1000>;
192 <&clks 0>, <&clks 0>;
195 dmas = <&edma0 0 16>, <&edma0 0 17>;
201 reg = <0x40030000 0x1000>;
205 <&clks 0>, <&clks 0>;
208 dmas = <&edma0 0 18>, <&edma0 0 19>;
214 reg = <0x40031000 0x1000>;
218 <&clks 0>, <&clks 0>;
221 dmas = <&edma0 0 20>, <&edma0 0 21>;
227 reg = <0x40032000 0x1000>;
231 <&clks 0>, <&clks 0>;
240 reg = <0x40037000 0x1000>;
249 reg = <0x40038000 0x1000>;
262 reg = <0x40039000 0x1000>;
274 reg = <0x4003b000 0x1000>;
286 reg = <0x4003d000 0x1000>;
294 reg = <0x4003e000 0x1000>;
302 #size-cells = <0>;
304 reg = <0x40044000 0x1000>, <0x20000000 0x10000000>;
315 reg = <0x40048000 0x1000>;
320 reg = <0x40049000 0x1000 0x400ff000 0x40>;
326 gpio-ranges = <&iomuxc 0 0 32>;
331 reg = <0x4004a000 0x1000 0x400ff040 0x40>;
337 gpio-ranges = <&iomuxc 0 32 32>;
342 reg = <0x4004b000 0x1000 0x400ff080 0x40>;
348 gpio-ranges = <&iomuxc 0 64 32>;
353 reg = <0x4004c000 0x1000 0x400ff0c0 0x40>;
359 gpio-ranges = <&iomuxc 0 96 32>;
364 reg = <0x4004d000 0x1000 0x400ff100 0x40>;
370 gpio-ranges = <&iomuxc 0 128 7>;
375 reg = <0x40050000 0x400>;
380 reg = <0x40050800 0x400>;
389 reg = <0x40050c00 0x400>;
398 reg = <0x40058000 0x1200>;
409 #size-cells = <0>;
411 reg = <0x40066000 0x1000>;
415 dmas = <&edma0 0 50>,
416 <&edma0 0 51>;
423 #size-cells = <0>;
425 reg = <0x40067000 0x1000>;
429 dmas = <&edma0 0 52>,
430 <&edma0 0 53>;
437 reg = <0x4006b000 0x1000>;
445 reg = <0x40034000 0x800>;
449 fsl,usbmisc = <&usbmisc0 0>;
457 reg = <0x40034800 0x200>;
464 reg = <0x4006e000 0x1000>;
473 reg = <0x40080000 0x0007f000>;
479 reg = <0x40098000 0x2000>,
480 <0x400a1000 0x1000>,
481 <0x400a2000 0x1000>;
494 reg = <0x400a5000 0x1000>;
499 compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
500 reg = <0x400a7000 0x2000>;
503 compatible = "fsl,sec-v4.0-mon-rtc-lp";
505 offset = <0x34>;
514 reg = <0x400a9000 0x1000>;
523 reg = <0x400aa000 0x1000>;
532 #size-cells = <0>;
534 reg = <0x400ac000 0x1000>;
539 dmas = <&edma1 0 10>,
540 <&edma1 0 11>;
547 #size-cells = <0>;
549 reg = <0x400ad000 0x1000>;
554 dmas = <&edma1 0 12>,
555 <&edma1 0 13>;
562 reg = <0x400bb000 0x1000>;
574 reg = <0x400b1000 0x1000>;
585 reg = <0x400b2000 0x1000>;
596 reg = <0x400b4000 0x800>;
600 fsl,usbmisc = <&usbmisc1 0>;
608 reg = <0x400b4800 0x200>;
615 reg = <0x400b8000 0x1000 0x400b9000 0x1000>;
628 #size-cells = <0>;
630 reg = <0x400c4000 0x1000>, <0x50000000 0x10000000>;
641 reg = <0x400cc000 1000>;
650 reg = <0x400cd000 1000>;
659 reg = <0x400d0000 0x1000>;
670 reg = <0x400d1000 0x1000>;
681 reg = <0x400d4000 0x4000>;
691 #size-cells = <0>;
693 reg = <0x400e0000 0x4000>;
702 #size-cells = <0>;
704 reg = <0x400e6000 0x1000>;
716 #size-cells = <0>;
718 reg = <0x400e7000 0x1000>;
729 compatible = "fsl,sec-v4.0";
732 reg = <0x400f0000 0x9000>;
733 ranges = <0 0x400f0000 0x9000>;
738 compatible = "fsl,sec-v4.0-job-ring";
739 reg = <0x1000 0x1000>;
744 compatible = "fsl,sec-v4.0-job-ring";
745 reg = <0x2000 0x1000>;