Lines Matching +full:1 +full:c000
13 #address-cells = <1>;
14 #size-cells = <1>;
19 #address-cells = <1>;
46 #address-cells = <1>;
47 #size-cells = <1>;
57 #address-cells = <1>;
58 #size-cells = <1>;
89 #address-cells = <1>;
90 #size-cells = <1>;
124 #address-cells = <1>;
131 #clock-cells = <1>;
157 #address-cells = <1>;
158 #size-cells = <1>;
161 <1 0xe1000000 0x01000000>,
168 #address-cells = <1>;
169 #size-cells = <1>;
183 #address-cells = <1>;
192 #address-cells = <1>;
201 ssp1: spi@2008c000 {
207 #address-cells = <1>;
216 #address-cells = <1>;
237 i2s1: i2s@2009c000 {
286 #address-cells = <1>;
296 #address-cells = <1>;
310 #address-cells = <1>;
311 #size-cells = <1>;
319 #address-cells = <1>;
320 #size-cells = <1>;
325 #clock-cells = <1>;
339 sic1: interrupt-controller@4000c000 {
357 interrupts = <1 IRQ_TYPE_LEVEL_LOW>,
375 uart7: serial@4001c000 {
397 timer4: timer@4002c000 {
415 watchdog: watchdog@4003c000 {
454 timer1: timer@4004c000 {
480 pwm1: pwm@4005c000 {