Lines Matching +full:imx6sx +full:- +full:lcdif
1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
6 #include <dt-bindings/clock/imx7d-clock.h>
7 #include <dt-bindings/power/imx7-power.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/reset/imx7-reset.h>
12 #include "imx7d-pinfunc.h"
15 #address-cells = <1>;
16 #size-cells = <1>;
19 * pre-existing /chosen node to be available to insert the
55 #address-cells = <1>;
56 #size-cells = <0>;
58 idle-states {
59 entry-method = "psci";
61 cpu_sleep_wait: cpu-sleep-wait {
62 compatible = "arm,idle-state";
63 arm,psci-suspend-param = <0x0010000>;
64 local-timer-stop;
65 entry-latency-us = <100>;
66 exit-latency-us = <50>;
67 min-residency-us = <1000>;
72 compatible = "arm,cortex-a7";
75 clock-frequency = <792000000>;
76 clock-latency = <61036>; /* two CLK32 periods */
78 cpu-idle-states = <&cpu_sleep_wait>;
79 operating-points-v2 = <&cpu0_opp_table>;
80 #cooling-cells = <2>;
81 nvmem-cells = <&fuse_grade>;
82 nvmem-cell-names = "speed_grade";
86 cpu0_opp_table: opp-table {
87 compatible = "operating-points-v2";
88 opp-shared;
90 opp-792000000 {
91 opp-hz = /bits/ 64 <792000000>;
92 opp-microvolt = <1000000>;
93 clock-latency-ns = <150000>;
94 opp-supported-hw = <0xf>, <0xf>;
98 ckil: clock-cki {
99 compatible = "fixed-clock";
100 #clock-cells = <0>;
101 clock-frequency = <32768>;
102 clock-output-names = "ckil";
105 osc: clock-osc {
106 compatible = "fixed-clock";
107 #clock-cells = <0>;
108 clock-frequency = <24000000>;
109 clock-output-names = "osc";
113 compatible = "usb-nop-xceiv";
115 clock-names = "main_clk";
116 #phy-cells = <0>;
120 compatible = "usb-nop-xceiv";
122 clock-names = "main_clk";
123 power-domains = <&pgc_hsic_phy>;
124 #phy-cells = <0>;
128 compatible = "arm,cortex-a7-pmu";
129 interrupt-parent = <&gpc>;
131 interrupt-affinity = <&cpu0>;
136 * non-configurable replicators don't show up on the
139 compatible = "arm,coresight-static-replicator";
141 out-ports {
142 #address-cells = <1>;
143 #size-cells = <0>;
148 remote-endpoint = <&tpiu_in_port>;
155 remote-endpoint = <&etr_in_port>;
160 in-ports {
163 remote-endpoint = <&etf_out_port>;
170 compatible = "arm,armv7-timer";
171 arm,cpu-registers-not-fw-configured;
172 interrupt-parent = <&intc>;
180 #address-cells = <1>;
181 #size-cells = <1>;
182 compatible = "simple-bus";
183 interrupt-parent = <&gpc>;
187 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
190 clock-names = "apb_pclk";
192 ca_funnel_in_ports: in-ports {
193 #address-cells = <1>;
194 #size-cells = <0>;
199 remote-endpoint = <&etm0_out_port>;
206 out-ports {
209 remote-endpoint = <&hugo_funnel_in_port0>;
217 compatible = "arm,coresight-etm3x", "arm,primecell";
221 clock-names = "apb_pclk";
223 out-ports {
226 remote-endpoint = <&ca_funnel_in_port0>;
233 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
236 clock-names = "apb_pclk";
238 in-ports {
239 #address-cells = <1>;
240 #size-cells = <0>;
245 remote-endpoint = <&ca_funnel_out_port0>;
258 out-ports {
261 remote-endpoint = <&etf_in_port>;
268 compatible = "arm,coresight-tmc", "arm,primecell";
271 clock-names = "apb_pclk";
273 in-ports {
276 remote-endpoint = <&hugo_funnel_out_port0>;
281 out-ports {
284 remote-endpoint = <&replicator_in_port0>;
291 compatible = "arm,coresight-tmc", "arm,primecell";
294 clock-names = "apb_pclk";
296 in-ports {
299 remote-endpoint = <&replicator_out_port1>;
306 compatible = "arm,coresight-tpiu", "arm,primecell";
309 clock-names = "apb_pclk";
311 in-ports {
314 remote-endpoint = <&replicator_out_port0>;
320 intc: interrupt-controller@31001000 {
321 compatible = "arm,cortex-a7-gic";
323 #interrupt-cells = <3>;
324 interrupt-controller;
325 interrupt-parent = <&intc>;
333 compatible = "fsl,aips-bus", "simple-bus";
334 #address-cells = <1>;
335 #size-cells = <1>;
340 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
344 gpio-controller;
345 #gpio-cells = <2>;
346 interrupt-controller;
347 #interrupt-cells = <2>;
348 gpio-ranges = <&iomuxc_lpsr 0 0 8>, <&iomuxc 8 5 8>;
352 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
356 gpio-controller;
357 #gpio-cells = <2>;
358 interrupt-controller;
359 #interrupt-cells = <2>;
360 gpio-ranges = <&iomuxc 0 13 32>;
364 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
368 gpio-controller;
369 #gpio-cells = <2>;
370 interrupt-controller;
371 #interrupt-cells = <2>;
372 gpio-ranges = <&iomuxc 0 45 29>;
376 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
380 gpio-controller;
381 #gpio-cells = <2>;
382 interrupt-controller;
383 #interrupt-cells = <2>;
384 gpio-ranges = <&iomuxc 0 74 24>;
388 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
392 gpio-controller;
393 #gpio-cells = <2>;
394 interrupt-controller;
395 #interrupt-cells = <2>;
396 gpio-ranges = <&iomuxc 0 98 18>;
400 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
404 gpio-controller;
405 #gpio-cells = <2>;
406 interrupt-controller;
407 #interrupt-cells = <2>;
408 gpio-ranges = <&iomuxc 0 116 23>;
412 compatible = "fsl,imx7d-gpio", "fsl,imx35-gpio";
416 gpio-controller;
417 #gpio-cells = <2>;
418 interrupt-controller;
419 #interrupt-cells = <2>;
420 gpio-ranges = <&iomuxc 0 139 16>;
424 compatible = "fsl,imx7d-wdt", "fsl,imx21-wdt";
431 compatible = "fsl,imx7d-wdt", "fsl,imx21-wdt";
439 compatible = "fsl,imx7d-wdt", "fsl,imx21-wdt";
447 compatible = "fsl,imx7d-wdt", "fsl,imx21-wdt";
455 compatible = "fsl,imx7d-iomuxc-lpsr";
457 fsl,input-sel = <&iomuxc>;
461 compatible = "fsl,imx7d-gpt", "fsl,imx6dl-gpt";
466 clock-names = "ipg", "per";
470 compatible = "fsl,imx7d-gpt", "fsl,imx6dl-gpt";
475 clock-names = "ipg", "per";
480 compatible = "fsl,imx7d-gpt", "fsl,imx6dl-gpt";
485 clock-names = "ipg", "per";
490 compatible = "fsl,imx7d-gpt", "fsl,imx6dl-gpt";
495 clock-names = "ipg", "per";
500 compatible = "fsl,imx7d-kpp", "fsl,imx21-kpp";
508 compatible = "fsl,imx7d-iomuxc";
512 gpr: iomuxc-gpr@30340000 {
513 compatible = "fsl,imx7d-iomuxc-gpr",
514 "fsl,imx6q-iomuxc-gpr", "syscon",
515 "simple-mfd";
518 mux: mux-controller {
519 compatible = "mmio-mux";
520 #mux-control-cells = <1>;
521 mux-reg-masks = <0x14 0x00000010>;
524 video_mux: csi-mux {
525 compatible = "video-mux";
526 mux-controls = <&mux 0>;
527 #address-cells = <1>;
528 #size-cells = <0>;
539 remote-endpoint = <&mipi_vc0_to_csi_mux>;
547 remote-endpoint = <&csi_from_csi_mux>;
554 #address-cells = <1>;
555 #size-cells = <1>;
556 compatible = "fsl,imx7d-ocotp", "syscon";
564 fuse_grade: fuse-grade@10 {
570 compatible = "fsl,imx7d-anatop", "fsl,imx6q-anatop",
571 "syscon", "simple-mfd";
576 reg_1p0d: regulator-vdd1p0d {
577 compatible = "fsl,anatop-regulator";
578 regulator-name = "vdd1p0d";
579 regulator-min-microvolt = <800000>;
580 regulator-max-microvolt = <1200000>;
581 anatop-reg-offset = <0x210>;
582 anatop-vol-bit-shift = <8>;
583 anatop-vol-bit-width = <5>;
584 anatop-min-bit-val = <8>;
585 anatop-min-voltage = <800000>;
586 anatop-max-voltage = <1200000>;
587 anatop-enable-bit = <0>;
590 reg_1p2: regulator-vdd1p2 {
591 compatible = "fsl,anatop-regulator";
592 regulator-name = "vdd1p2";
593 regulator-min-microvolt = <1100000>;
594 regulator-max-microvolt = <1300000>;
595 anatop-reg-offset = <0x220>;
596 anatop-vol-bit-shift = <8>;
597 anatop-vol-bit-width = <5>;
598 anatop-min-bit-val = <0x14>;
599 anatop-min-voltage = <1100000>;
600 anatop-max-voltage = <1300000>;
601 anatop-enable-bit = <0>;
605 compatible = "fsl,imx7d-tempmon";
606 interrupt-parent = <&gpc>;
609 nvmem-cells = <&tempmon_calib>, <&fuse_grade>;
610 nvmem-cell-names = "calib", "temp_grade";
616 compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
619 snvs_rtc: snvs-rtc-lp {
620 compatible = "fsl,sec-v4.0-mon-rtc-lp";
626 clock-names = "snvs-rtc";
629 snvs_pwrkey: snvs-powerkey {
630 compatible = "fsl,sec-v4.0-pwrkey";
634 clock-names = "snvs-pwrkey";
636 wakeup-source;
641 clks: clock-controller@30380000 {
642 compatible = "fsl,imx7d-ccm";
646 #clock-cells = <1>;
648 clock-names = "ckil", "osc";
651 src: reset-controller@30390000 {
652 compatible = "fsl,imx7d-src", "syscon";
655 #reset-cells = <1>;
659 compatible = "fsl,imx7d-gpc";
661 interrupt-controller;
663 #interrupt-cells = <3>;
664 interrupt-parent = <&intc>;
665 #power-domain-cells = <1>;
668 #address-cells = <1>;
669 #size-cells = <0>;
671 pgc_mipi_phy: power-domain@0 {
672 #power-domain-cells = <0>;
674 power-supply = <®_1p0d>;
677 pgc_pcie_phy: power-domain@1 {
678 #power-domain-cells = <0>;
680 power-supply = <®_1p0d>;
683 pgc_hsic_phy: power-domain@2 {
684 #power-domain-cells = <0>;
686 power-supply = <®_1p2>;
693 compatible = "fsl,aips-bus", "simple-bus";
694 #address-cells = <1>;
695 #size-cells = <1>;
700 compatible = "fsl,imx7d-adc";
704 clock-names = "adc";
705 #io-channel-cells = <1>;
710 compatible = "fsl,imx7d-adc";
714 clock-names = "adc";
715 #io-channel-cells = <1>;
720 #address-cells = <1>;
721 #size-cells = <0>;
722 compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
727 clock-names = "ipg", "per";
732 compatible = "fsl,vf610-ftm-pwm";
734 #pwm-cells = <3>;
736 clock-names = "ftm_sys", "ftm_ext",
746 compatible = "fsl,vf610-ftm-pwm";
748 #pwm-cells = <3>;
750 clock-names = "ftm_sys", "ftm_ext",
760 compatible = "fsl,imx7d-pwm", "fsl,imx27-pwm";
765 clock-names = "ipg", "per";
766 #pwm-cells = <3>;
771 compatible = "fsl,imx7d-pwm", "fsl,imx27-pwm";
776 clock-names = "ipg", "per";
777 #pwm-cells = <3>;
782 compatible = "fsl,imx7d-pwm", "fsl,imx27-pwm";
787 clock-names = "ipg", "per";
788 #pwm-cells = <3>;
793 compatible = "fsl,imx7d-pwm", "fsl,imx27-pwm";
798 clock-names = "ipg", "per";
799 #pwm-cells = <3>;
804 compatible = "fsl,imx7-csi";
810 clock-names = "axi", "mclk", "dcic";
815 remote-endpoint = <&csi_mux_to_csi>;
820 lcdif: lcdif@30730000 { label
821 compatible = "fsl,imx7d-lcdif", "fsl,imx6sx-lcdif";
826 clock-names = "pix", "axi";
830 mipi_csi: mipi-csi@30750000 {
831 compatible = "fsl,imx7-mipi-csi2";
837 clock-names = "pclk", "wrap", "phy";
838 power-domains = <&pgc_mipi_phy>;
839 phy-supply = <®_1p0d>;
844 #address-cells = <1>;
845 #size-cells = <0>;
855 remote-endpoint = <&csi_mux_from_mipi_vc0>;
863 compatible = "fsl,aips-bus", "simple-bus";
864 #address-cells = <1>;
865 #size-cells = <1>;
869 spba-bus@30800000 {
870 compatible = "fsl,spba-bus", "simple-bus";
871 #address-cells = <1>;
872 #size-cells = <1>;
877 #address-cells = <1>;
878 #size-cells = <0>;
879 compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
884 clock-names = "ipg", "per";
889 #address-cells = <1>;
890 #size-cells = <0>;
891 compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
896 clock-names = "ipg", "per";
901 #address-cells = <1>;
902 #size-cells = <0>;
903 compatible = "fsl,imx7d-ecspi", "fsl,imx51-ecspi";
908 clock-names = "ipg", "per";
913 compatible = "fsl,imx7d-uart",
914 "fsl,imx6q-uart";
919 clock-names = "ipg", "per";
924 compatible = "fsl,imx7d-uart",
925 "fsl,imx6q-uart";
930 clock-names = "ipg", "per";
935 compatible = "fsl,imx7d-uart",
936 "fsl,imx6q-uart";
941 clock-names = "ipg", "per";
946 #sound-dai-cells = <0>;
947 compatible = "fsl,imx7d-sai", "fsl,imx6sx-sai";
954 clock-names = "bus", "mclk1", "mclk2", "mclk3";
955 dma-names = "rx", "tx";
961 #sound-dai-cells = <0>;
962 compatible = "fsl,imx7d-sai", "fsl,imx6sx-sai";
969 clock-names = "bus", "mclk1", "mclk2", "mclk3";
970 dma-names = "rx", "tx";
976 #sound-dai-cells = <0>;
977 compatible = "fsl,imx7d-sai", "fsl,imx6sx-sai";
984 clock-names = "bus", "mclk1", "mclk2", "mclk3";
985 dma-names = "rx", "tx";
992 compatible = "fsl,sec-v4.0";
993 #address-cells = <1>;
994 #size-cells = <1>;
1000 clock-names = "ipg", "aclk";
1003 compatible = "fsl,sec-v4.0-job-ring";
1009 compatible = "fsl,sec-v4.0-job-ring";
1015 compatible = "fsl,sec-v4.0-job-ring";
1022 compatible = "fsl,imx7d-flexcan", "fsl,imx6q-flexcan";
1027 clock-names = "ipg", "per";
1028 fsl,stop-mode = <&gpr 0x10 1>;
1033 compatible = "fsl,imx7d-flexcan", "fsl,imx6q-flexcan";
1038 clock-names = "ipg", "per";
1039 fsl,stop-mode = <&gpr 0x10 2>;
1044 #address-cells = <1>;
1045 #size-cells = <0>;
1046 compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c";
1054 #address-cells = <1>;
1055 #size-cells = <0>;
1056 compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c";
1064 #address-cells = <1>;
1065 #size-cells = <0>;
1066 compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c";
1074 #address-cells = <1>;
1075 #size-cells = <0>;
1076 compatible = "fsl,imx7d-i2c", "fsl,imx21-i2c";
1084 compatible = "fsl,imx7d-uart",
1085 "fsl,imx6q-uart";
1090 clock-names = "ipg", "per";
1095 compatible = "fsl,imx7d-uart",
1096 "fsl,imx6q-uart";
1101 clock-names = "ipg", "per";
1106 compatible = "fsl,imx7d-uart",
1107 "fsl,imx6q-uart";
1112 clock-names = "ipg", "per";
1117 compatible = "fsl,imx7d-uart",
1118 "fsl,imx6q-uart";
1123 clock-names = "ipg", "per";
1128 compatible = "fsl,imx7s-mu", "fsl,imx6sx-mu";
1132 #mbox-cells = <2>;
1137 compatible = "fsl,imx7s-mu", "fsl,imx6sx-mu";
1141 #mbox-cells = <2>;
1142 fsl,mu-side-b;
1147 compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
1153 phy-clkgate-delay-us = <400>;
1158 compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
1166 phy-clkgate-delay-us = <400>;
1171 #index-cells = <1>;
1172 compatible = "fsl,imx7d-usbmisc", "fsl,imx6q-usbmisc";
1177 #index-cells = <1>;
1178 compatible = "fsl,imx7d-usbmisc", "fsl,imx6q-usbmisc";
1183 compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc";
1189 clock-names = "ipg", "ahb", "per";
1190 bus-width = <4>;
1191 fsl,tuning-step = <2>;
1192 fsl,tuning-start-tap = <20>;
1197 compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc";
1203 clock-names = "ipg", "ahb", "per";
1204 bus-width = <4>;
1205 fsl,tuning-step = <2>;
1206 fsl,tuning-start-tap = <20>;
1211 compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc";
1217 clock-names = "ipg", "ahb", "per";
1218 bus-width = <4>;
1219 fsl,tuning-step = <2>;
1220 fsl,tuning-start-tap = <20>;
1225 compatible = "fsl,imx7d-qspi";
1227 reg-names = "QuadSPI", "QuadSPI-memory";
1228 #address-cells = <1>;
1229 #size-cells = <0>;
1233 clock-names = "qspi_en", "qspi";
1237 sdma: dma-controller@30bd0000 {
1238 compatible = "fsl,imx7d-sdma", "fsl,imx35-sdma";
1243 clock-names = "ipg", "ahb";
1244 #dma-cells = <3>;
1245 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin";
1249 compatible = "fsl,imx7d-fec", "fsl,imx6sx-fec";
1251 interrupt-names = "int0", "int1", "int2", "pps";
1261 clock-names = "ipg", "ahb", "ptp",
1263 fsl,num-tx-queues = <3>;
1264 fsl,num-rx-queues = <3>;
1265 fsl,stop-mode = <&gpr 0x10 3>;
1270 dma_apbh: dma-controller@33000000 {
1271 compatible = "fsl,imx7d-dma-apbh", "fsl,imx28-dma-apbh";
1277 #dma-cells = <1>;
1278 dma-channels = <4>;
1282 gpmi: nand-controller@33002000 {
1283 compatible = "fsl,imx7d-gpmi-nand";
1284 #address-cells = <1>;
1285 #size-cells = <0>;
1287 reg-names = "gpmi-nand", "bch";
1289 interrupt-names = "bch";
1292 clock-names = "gpmi_io", "gpmi_bch_apb";
1294 dma-names = "rx-tx";
1296 assigned-clocks = <&clks IMX7D_NAND_ROOT_SRC>;
1297 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_500M_CLK>;