Lines Matching +full:0 +full:x80000000
16 reg = <0x80000000 0x4000000>;
19 reg_fec_3v3: regulator-0 {
24 gpio = <&gpio2 3 0>;
47 gpio = <&gpio4 6 0>;
67 fsl,pcr = <0xfa208b80>;
88 pinctrl-0 = <&pinctrl_audmux>;
94 pinctrl-0 = <&pinctrl_can1>;
101 pinctrl-0 = <&pinctrl_esdhc1>;
103 wp-gpios = <&gpio2 0 GPIO_ACTIVE_HIGH>;
110 pinctrl-0 = <&pinctrl_fec>;
119 pinctrl-0 = <&pinctrl_i2c1>;
124 reg = <0x0a>;
135 MX25_PAD_RW__AUD4_TXFS 0xe0
136 MX25_PAD_OE__AUD4_TXC 0xe0
137 MX25_PAD_EB0__AUD4_TXD 0xe0
138 MX25_PAD_EB1__AUD4_RXD 0xe0
144 MX25_PAD_GPIO_A__CAN1_TX 0x0
145 MX25_PAD_GPIO_B__CAN1_RX 0x0
146 MX25_PAD_D14__GPIO_4_6 0x80000000
152 MX25_PAD_SD1_CMD__ESDHC1_CMD 0x80000000
153 MX25_PAD_SD1_CLK__ESDHC1_CLK 0x80000000
154 MX25_PAD_SD1_DATA0__ESDHC1_DAT0 0x80000000
155 MX25_PAD_SD1_DATA1__ESDHC1_DAT1 0x80000000
156 MX25_PAD_SD1_DATA2__ESDHC1_DAT2 0x80000000
157 MX25_PAD_SD1_DATA3__ESDHC1_DAT3 0x80000000
158 MX25_PAD_A14__GPIO_2_0 0x80000000
159 MX25_PAD_A15__GPIO_2_1 0x80000000
165 MX25_PAD_FEC_MDC__FEC_MDC 0x80000000
166 MX25_PAD_FEC_MDIO__FEC_MDIO 0x400001e0
167 MX25_PAD_FEC_TDATA0__FEC_TDATA0 0x80000000
168 MX25_PAD_FEC_TDATA1__FEC_TDATA1 0x80000000
169 MX25_PAD_FEC_TX_EN__FEC_TX_EN 0x80000000
170 MX25_PAD_FEC_RDATA0__FEC_RDATA0 0x80000000
171 MX25_PAD_FEC_RDATA1__FEC_RDATA1 0x80000000
172 MX25_PAD_FEC_RX_DV__FEC_RX_DV 0x80000000
173 MX25_PAD_FEC_TX_CLK__FEC_TX_CLK 0x1c0
174 MX25_PAD_A17__GPIO_2_3 0x80000000
175 MX25_PAD_D12__GPIO_4_8 0x80000000
181 MX25_PAD_I2C1_CLK__I2C1_CLK 0x80000000
182 MX25_PAD_I2C1_DAT__I2C1_DAT 0x80000000
188 MX25_PAD_KPP_ROW0__KPP_ROW0 0x80000000
189 MX25_PAD_KPP_ROW1__KPP_ROW1 0x80000000
190 MX25_PAD_KPP_ROW2__KPP_ROW2 0x80000000
191 MX25_PAD_KPP_ROW3__KPP_ROW3 0x80000000
192 MX25_PAD_KPP_COL0__KPP_COL0 0x80000000
193 MX25_PAD_KPP_COL1__KPP_COL1 0x80000000
194 MX25_PAD_KPP_COL2__KPP_COL2 0x80000000
195 MX25_PAD_KPP_COL3__KPP_COL3 0x80000000
201 MX25_PAD_LD0__LD0 0xe0
202 MX25_PAD_LD1__LD1 0xe0
203 MX25_PAD_LD2__LD2 0xe0
204 MX25_PAD_LD3__LD3 0xe0
205 MX25_PAD_LD4__LD4 0xe0
206 MX25_PAD_LD5__LD5 0xe0
207 MX25_PAD_LD6__LD6 0xe0
208 MX25_PAD_LD7__LD7 0xe0
209 MX25_PAD_LD8__LD8 0xe0
210 MX25_PAD_LD9__LD9 0xe0
211 MX25_PAD_LD10__LD10 0xe0
212 MX25_PAD_LD11__LD11 0xe0
213 MX25_PAD_LD12__LD12 0xe0
214 MX25_PAD_LD13__LD13 0xe0
215 MX25_PAD_LD14__LD14 0xe0
216 MX25_PAD_LD15__LD15 0xe0
217 MX25_PAD_GPIO_E__LD16 0xe0
218 MX25_PAD_GPIO_F__LD17 0xe0
219 MX25_PAD_HSYNC__HSYNC 0xe0
220 MX25_PAD_VSYNC__VSYNC 0xe0
221 MX25_PAD_LSCLK__LSCLK 0xe0
222 MX25_PAD_OE_ACD__OE_ACD 0xe0
223 MX25_PAD_CONTRAST__CONTRAST 0xe0
229 MX25_PAD_UART1_RTS__UART1_RTS 0xe0
230 MX25_PAD_UART1_CTS__UART1_CTS 0xe0
231 MX25_PAD_UART1_TXD__UART1_TXD 0x80000000
232 MX25_PAD_UART1_RXD__UART1_RXD 0xc0
240 fsl,lpccr = <0x00a903ff>;
241 fsl,lscr1 = <0x00120300>;
242 fsl,dmacr = <0x00020010>;
244 pinctrl-0 = <&pinctrl_lcd>;
255 pinctrl-0 = <&pinctrl_kpp>;
257 MATRIX_KEY(0x0, 0x0, KEY_UP)
258 MATRIX_KEY(0x0, 0x1, KEY_DOWN)
259 MATRIX_KEY(0x0, 0x2, KEY_VOLUMEDOWN)
260 MATRIX_KEY(0x0, 0x3, KEY_HOME)
261 MATRIX_KEY(0x1, 0x0, KEY_RIGHT)
262 MATRIX_KEY(0x1, 0x1, KEY_LEFT)
263 MATRIX_KEY(0x1, 0x2, KEY_ENTER)
264 MATRIX_KEY(0x1, 0x3, KEY_VOLUMEUP)
265 MATRIX_KEY(0x2, 0x0, KEY_F6)
266 MATRIX_KEY(0x2, 0x1, KEY_F8)
267 MATRIX_KEY(0x2, 0x2, KEY_F9)
268 MATRIX_KEY(0x2, 0x3, KEY_F10)
269 MATRIX_KEY(0x3, 0x0, KEY_F1)
270 MATRIX_KEY(0x3, 0x1, KEY_F2)
271 MATRIX_KEY(0x3, 0x2, KEY_F3)
272 MATRIX_KEY(0x3, 0x2, KEY_POWER)
291 pinctrl-0 = <&pinctrl_uart1>;