dts/aspeed/aspeed-g5.dtsi

1 // SPDX-License-Identifier: GPL-2.0+
2 #include <dt-bindings/clock/aspeed-clock.h>
3 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
8 	#address-cells = <1>;
9 	#size-cells = <1>;
10 	interrupt-parent = <&vic>;
36 		#address-cells = <1>;
37 		#size-cells = <0>;
40 			compatible = "arm,arm1176jzf-s";
52 		compatible = "simple-bus";
53 		#address-cells = <1>;
54 		#size-cells = <1>;
59 			#address-cells = <1>;
60 			#size-cells = <0>;
61 			compatible = "aspeed,ast2500-fmc";
62 			clocks = <&syscon ASPEED_CLK_AHB>;
67 				compatible = "jedec,spi-nor";
68 				spi-max-frequency = <50000000>;
69 				spi-rx-bus-width = <2>;
74 				compatible = "jedec,spi-nor";
75 				spi-max-frequency = <50000000>;
76 				spi-rx-bus-width = <2>;
81 				compatible = "jedec,spi-nor";
82 				spi-max-frequency = <50000000>;
83 				spi-rx-bus-width = <2>;
90 			#address-cells = <1>;
91 			#size-cells = <0>;
92 			compatible = "aspeed,ast2500-spi";
93 			clocks = <&syscon ASPEED_CLK_AHB>;
97 				compatible = "jedec,spi-nor";
98 				spi-max-frequency = <50000000>;
99 				spi-rx-bus-width = <2>;
104 				compatible = "jedec,spi-nor";
105 				spi-max-frequency = <50000000>;
106 				spi-rx-bus-width = <2>;
113 			#address-cells = <1>;
114 			#size-cells = <0>;
115 			compatible = "aspeed,ast2500-spi";
116 			clocks = <&syscon ASPEED_CLK_AHB>;
120 				compatible = "jedec,spi-nor";
121 				spi-max-frequency = <50000000>;
122 				spi-rx-bus-width = <2>;
127 				compatible = "jedec,spi-nor";
128 				spi-max-frequency = <50000000>;
129 				spi-rx-bus-width = <2>;
134 		vic: interrupt-controller@1e6c0080 {
135 			compatible = "aspeed,ast2400-vic";
136 			interrupt-controller;
137 			#interrupt-cells = <1>;
138 			valid-sources = <0xfefff7ff 0x0807ffff>;
142 		cvic: interrupt-controller@1e6c2000 {
143 			compatible = "aspeed,ast2500-cvic", "aspeed,cvic";
144 			valid-sources = <0xffffffff>;
145 			copro-sw-interrupts = <1>;
150 			compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
153 			clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>;
158 			compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
161 			clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>;
166 			compatible = "aspeed,ast2500-ehci", "generic-ehci";
169 			clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
170 			pinctrl-names = "default";
171 			pinctrl-0 = <&pinctrl_usb2ah_default>;
176 			compatible = "aspeed,ast2500-ehci", "generic-ehci";
179 			clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>;
180 			pinctrl-names = "default";
181 			pinctrl-0 = <&pinctrl_usb2bh_default>;
186 			compatible = "aspeed,ast2500-uhci", "generic-uhci";
190 			clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>;
198 		vhub: usb-vhub@1e6a0000 {
199 			compatible = "aspeed,ast2500-usb-vhub";
202 			clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
203 			aspeed,vhub-downstream-ports = <5>;
204 			aspeed,vhub-generic-endpoints = <15>;
205 			pinctrl-names = "default";
206 			pinctrl-0 = <&pinctrl_usb2ad_default>;
211 			compatible = "simple-bus";
213 			#address-cells = <1>;
214 			#size-cells = <1>;
217 			edac: memory-controller@1e6e0000 {
218 				compatible = "aspeed,ast2500-sdram-edac";
224 			syscon: syscon@1e6e2000 {  label
225 				compatible = "aspeed,ast2500-scu", "syscon", "simple-mfd";
227 				#address-cells = <1>;
228 				#size-cells = <1>;
230 				#clock-cells = <1>;
231 				#reset-cells = <1>;
233 				scu_ic: interrupt-controller@18 {
234 					#interrupt-cells = <1>;
235 					compatible = "aspeed,ast2500-scu-ic";
238 					interrupt-controller;
241 				p2a: p2a-control@2c {
242 					compatible = "aspeed,ast2500-p2a-ctrl";
247 				silicon-id@7c {
248 					compatible = "aspeed,ast2500-silicon-id", "aspeed,silicon-id";
253 					compatible = "aspeed,ast2500-pinctrl";
255 					aspeed,external-nodes = <&gfx>, <&lhc>;
267 				compatible = "aspeed,ast2500-hace";
270 				clocks = <&syscon ASPEED_CLK_GATE_YCLK>;
271 				resets = <&syscon ASPEED_RESET_HACE>;
275 				compatible = "aspeed,ast2500-gfx", "syscon";
277 				reg-io-width = <4>;
278 				clocks = <&syscon ASPEED_CLK_GATE_D1CLK>;
279 				resets = <&syscon ASPEED_RESET_CRT1>;
280 				syscon = <&syscon>;
286 				compatible = "aspeed,ast2500-xdma";
288 				clocks = <&syscon ASPEED_CLK_GATE_BCLK>;
289 				resets = <&syscon ASPEED_RESET_XDMA>;
290 				interrupts-extended = <&vic 6>, <&scu_ic ASPEED_AST2500_SCU_IC_PCIE_RESET_LO_TO_HI>;
291 				aspeed,pcie-device = "bmc";
292 				aspeed,scu = <&syscon>;
297 				compatible = "aspeed,ast2500-adc";
299 				clocks = <&syscon ASPEED_CLK_APB>;
300 				resets = <&syscon ASPEED_RESET_ADC>;
301 				#io-channel-cells = <1>;
309 			compatible = "aspeed,ast2500-video-engine";
311 			clocks = <&syscon ASPEED_CLK_GATE_VCLK>,
312 				 <&syscon ASPEED_CLK_GATE_ECLK>;
313 			clock-names = "vclk", "eclk";
319 			compatible = "mmio-sram";
322 			#address-cells = <1>;
323 			#size-cells = <1>;
326 		sdmmc: sd-controller@1e740000 {
327 			compatible = "aspeed,ast2500-sd-controller";
329 			#address-cells = <1>;
330 			#size-cells = <1>;
332 			clocks = <&syscon ASPEED_CLK_GATE_SDCLK>;
336 				compatible = "aspeed,ast2500-sdhci";
339 				sdhci,auto-cmd12;
340 				clocks = <&syscon ASPEED_CLK_SDIO>;
345 				compatible = "aspeed,ast2500-sdhci";
348 				sdhci,auto-cmd12;
349 				clocks = <&syscon ASPEED_CLK_SDIO>;
355 			compatible = "simple-bus";
357 			#address-cells = <1>;
358 			#size-cells = <1>;
362 				#gpio-cells = <2>;
363 				gpio-controller;
364 				compatible = "aspeed,ast2500-gpio";
367 				gpio-ranges = <&pinctrl 0 0 232>;
368 				clocks = <&syscon ASPEED_CLK_APB>;
369 				interrupt-controller;
370 				#interrupt-cells = <2>;
374 				#gpio-cells = <2>;
375 				compatible = "aspeed,ast2500-sgpio";
376 				gpio-controller;
379 				clocks = <&syscon ASPEED_CLK_APB>;
380 				#interrupt-cells = <2>;
381 				interrupt-controller;
382 				bus-frequency = <12000000>;
383 				pinctrl-names = "default";
384 				pinctrl-0 = <&pinctrl_sgpm_default>;
389 				compatible = "aspeed,ast2500-rtc";
396 				compatible = "aspeed,ast2400-timer";
399 				clocks = <&syscon ASPEED_CLK_APB>;
400 				clock-names = "PCLK";
406 				reg-shift = <2>;
408 				clocks = <&syscon ASPEED_CLK_GATE_UART1CLK>;
410 				no-loopback-test;
417 				reg-shift = <2>;
419 				clocks = <&syscon ASPEED_CLK_GATE_UART5CLK>;
420 				no-loopback-test;
425 				compatible = "aspeed,ast2500-wdt";
427 				clocks = <&syscon ASPEED_CLK_APB>;
431 				compatible = "aspeed,ast2500-wdt";
433 				clocks = <&syscon ASPEED_CLK_APB>;
437 				compatible = "aspeed,ast2500-wdt";
439 				clocks = <&syscon ASPEED_CLK_APB>;
443 			pwm_tacho: pwm-tacho-controller@1e786000 {
444 				compatible = "aspeed,ast2500-pwm-tacho";
445 				#address-cells = <1>;
446 				#size-cells = <0>;
448 				clocks = <&syscon ASPEED_CLK_24M>;
449 				resets = <&syscon ASPEED_RESET_PWM>;
454 				compatible = "aspeed,ast2500-vuart";
456 				reg-shift = <2>;
458 				clocks = <&syscon ASPEED_CLK_APB>;
459 				no-loopback-test;
464 				compatible = "aspeed,ast2500-lpc-v2", "simple-mfd", "syscon";
466 				reg-io-width = <4>;
468 				#address-cells = <1>;
469 				#size-cells = <1>;
473 					compatible = "aspeed,ast2500-kcs-bmc-v2";
476 					clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
481 					compatible = "aspeed,ast2500-kcs-bmc-v2";
484 					clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
489 					compatible = "aspeed,ast2500-kcs-bmc-v2";
492 					clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
497 					compatible = "aspeed,ast2500-kcs-bmc-v2";
500 					clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
504 				lpc_ctrl: lpc-ctrl@80 {
505 					compatible = "aspeed,ast2500-lpc-ctrl";
507 					clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
511 				lpc_snoop: lpc-snoop@90 {
512 					compatible = "aspeed,ast2500-lpc-snoop";
515 					clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
519 				lpc_reset: reset-controller@98 {
520 					compatible = "aspeed,ast2500-lpc-reset";
522 					#reset-cells = <1>;
525 				uart_routing: uart-routing@9c {
526 					compatible = "aspeed,ast2500-uart-routing";
532 					compatible = "aspeed,ast2500-lhc";
538 					compatible = "aspeed,ast2500-ibt-bmc";
541 					clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
547 				compatible = "simple-bus";
548 				#address-cells = <1>;
549 				#size-cells = <1>;
553 			peci0: peci-controller@1e78b000 {
554 				compatible = "aspeed,ast2500-peci";
557 				clocks = <&syscon ASPEED_CLK_GATE_REFCLK>;
558 				resets = <&syscon ASPEED_RESET_PECI>;
559 				cmd-timeout-ms = <1000>;
560 				clock-frequency = <1000000>;
567 				reg-shift = <2>;
569 				clocks = <&syscon ASPEED_CLK_GATE_UART2CLK>;
571 				no-loopback-test;
578 				reg-shift = <2>;
580 				clocks = <&syscon ASPEED_CLK_GATE_UART3CLK>;
582 				no-loopback-test;
589 				reg-shift = <2>;
591 				clocks = <&syscon ASPEED_CLK_GATE_UART4CLK>;
593 				no-loopback-test;
603 	i2c_ic: interrupt-controller@0 {
604 		#interrupt-cells = <1>;
605 		compatible = "aspeed,ast2500-i2c-ic";
608 		interrupt-controller;
612 		#address-cells = <1>;
613 		#size-cells = <0>;
616 		compatible = "aspeed,ast2500-i2c-bus";
617 		clocks = <&syscon ASPEED_CLK_APB>;
618 		resets = <&syscon ASPEED_RESET_I2C>;
619 		bus-frequency = <100000>;
621 		interrupt-parent = <&i2c_ic>;
627 		#address-cells = <1>;
628 		#size-cells = <0>;
631 		compatible = "aspeed,ast2500-i2c-bus";
632 		clocks = <&syscon ASPEED_CLK_APB>;
633 		resets = <&syscon ASPEED_RESET_I2C>;
634 		bus-frequency = <100000>;
636 		interrupt-parent = <&i2c_ic>;
642 		#address-cells = <1>;
643 		#size-cells = <0>;
646 		compatible = "aspeed,ast2500-i2c-bus";
647 		clocks = <&syscon ASPEED_CLK_APB>;
648 		resets = <&syscon ASPEED_RESET_I2C>;
649 		bus-frequency = <100000>;
651 		interrupt-parent = <&i2c_ic>;
652 		pinctrl-names = "default";
653 		pinctrl-0 = <&pinctrl_i2c3_default>;
658 		#address-cells = <1>;
659 		#size-cells = <0>;
662 		compatible = "aspeed,ast2500-i2c-bus";
663 		clocks = <&syscon ASPEED_CLK_APB>;
664 		resets = <&syscon ASPEED_RESET_I2C>;
665 		bus-frequency = <100000>;
667 		interrupt-parent = <&i2c_ic>;
668 		pinctrl-names = "default";
669 		pinctrl-0 = <&pinctrl_i2c4_default>;
674 		#address-cells = <1>;
675 		#size-cells = <0>;
678 		compatible = "aspeed,ast2500-i2c-bus";
679 		clocks = <&syscon ASPEED_CLK_APB>;
680 		resets = <&syscon ASPEED_RESET_I2C>;
681 		bus-frequency = <100000>;
683 		interrupt-parent = <&i2c_ic>;
684 		pinctrl-names = "default";
685 		pinctrl-0 = <&pinctrl_i2c5_default>;
690 		#address-cells = <1>;
691 		#size-cells = <0>;
694 		compatible = "aspeed,ast2500-i2c-bus";
695 		clocks = <&syscon ASPEED_CLK_APB>;
696 		resets = <&syscon ASPEED_RESET_I2C>;
697 		bus-frequency = <100000>;
699 		interrupt-parent = <&i2c_ic>;
700 		pinctrl-names = "default";
701 		pinctrl-0 = <&pinctrl_i2c6_default>;
706 		#address-cells = <1>;
707 		#size-cells = <0>;
710 		compatible = "aspeed,ast2500-i2c-bus";
711 		clocks = <&syscon ASPEED_CLK_APB>;
712 		resets = <&syscon ASPEED_RESET_I2C>;
713 		bus-frequency = <100000>;
715 		interrupt-parent = <&i2c_ic>;
716 		pinctrl-names = "default";
717 		pinctrl-0 = <&pinctrl_i2c7_default>;
722 		#address-cells = <1>;
723 		#size-cells = <0>;
726 		compatible = "aspeed,ast2500-i2c-bus";
727 		clocks = <&syscon ASPEED_CLK_APB>;
728 		resets = <&syscon ASPEED_RESET_I2C>;
729 		bus-frequency = <100000>;
731 		interrupt-parent = <&i2c_ic>;
732 		pinctrl-names = "default";
733 		pinctrl-0 = <&pinctrl_i2c8_default>;
738 		#address-cells = <1>;
739 		#size-cells = <0>;
742 		compatible = "aspeed,ast2500-i2c-bus";
743 		clocks = <&syscon ASPEED_CLK_APB>;
744 		resets = <&syscon ASPEED_RESET_I2C>;
745 		bus-frequency = <100000>;
747 		interrupt-parent = <&i2c_ic>;
748 		pinctrl-names = "default";
749 		pinctrl-0 = <&pinctrl_i2c9_default>;
754 		#address-cells = <1>;
755 		#size-cells = <0>;
758 		compatible = "aspeed,ast2500-i2c-bus";
759 		clocks = <&syscon ASPEED_CLK_APB>;
760 		resets = <&syscon ASPEED_RESET_I2C>;
761 		bus-frequency = <100000>;
763 		interrupt-parent = <&i2c_ic>;
764 		pinctrl-names = "default";
765 		pinctrl-0 = <&pinctrl_i2c10_default>;
770 		#address-cells = <1>;
771 		#size-cells = <0>;
774 		compatible = "aspeed,ast2500-i2c-bus";
775 		clocks = <&syscon ASPEED_CLK_APB>;
776 		resets = <&syscon ASPEED_RESET_I2C>;
777 		bus-frequency = <100000>;
779 		interrupt-parent = <&i2c_ic>;
780 		pinctrl-names = "default";
781 		pinctrl-0 = <&pinctrl_i2c11_default>;
786 		#address-cells = <1>;
787 		#size-cells = <0>;
790 		compatible = "aspeed,ast2500-i2c-bus";
791 		clocks = <&syscon ASPEED_CLK_APB>;
792 		resets = <&syscon ASPEED_RESET_I2C>;
793 		bus-frequency = <100000>;
795 		interrupt-parent = <&i2c_ic>;
796 		pinctrl-names = "default";
797 		pinctrl-0 = <&pinctrl_i2c12_default>;
802 		#address-cells = <1>;
803 		#size-cells = <0>;
806 		compatible = "aspeed,ast2500-i2c-bus";
807 		clocks = <&syscon ASPEED_CLK_APB>;
808 		resets = <&syscon ASPEED_RESET_I2C>;
809 		bus-frequency = <100000>;
811 		interrupt-parent = <&i2c_ic>;
812 		pinctrl-names = "default";
813 		pinctrl-0 = <&pinctrl_i2c13_default>;
818 		#address-cells = <1>;
819 		#size-cells = <0>;
822 		compatible = "aspeed,ast2500-i2c-bus";
823 		clocks = <&syscon ASPEED_CLK_APB>;
824 		resets = <&syscon ASPEED_RESET_I2C>;
825 		bus-frequency = <100000>;
827 		interrupt-parent = <&i2c_ic>;
828 		pinctrl-names = "default";
829 		pinctrl-0 = <&pinctrl_i2c14_default>;