dts/aspeed/aspeed-g5.dtsi

62 			clocks = <&syscon ASPEED_CLK_AHB>;
93 			clocks = <&syscon ASPEED_CLK_AHB>;
116 			clocks = <&syscon ASPEED_CLK_AHB>;
153 			clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>;
161 			clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>;
169 			clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
179 			clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>;
190 			clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>;
202 			clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
224 			syscon: syscon@1e6e2000 {  label
225 				compatible = "aspeed,ast2500-scu", "syscon", "simple-mfd";
270 				clocks = <&syscon ASPEED_CLK_GATE_YCLK>;
271 				resets = <&syscon ASPEED_RESET_HACE>;
275 				compatible = "aspeed,ast2500-gfx", "syscon";
278 				clocks = <&syscon ASPEED_CLK_GATE_D1CLK>;
279 				resets = <&syscon ASPEED_RESET_CRT1>;
280 				syscon = <&syscon>;
288 				clocks = <&syscon ASPEED_CLK_GATE_BCLK>;
289 				resets = <&syscon ASPEED_RESET_XDMA>;
292 				aspeed,scu = <&syscon>;
299 				clocks = <&syscon ASPEED_CLK_APB>;
300 				resets = <&syscon ASPEED_RESET_ADC>;
311 			clocks = <&syscon ASPEED_CLK_GATE_VCLK>,
312 				 <&syscon ASPEED_CLK_GATE_ECLK>;
332 			clocks = <&syscon ASPEED_CLK_GATE_SDCLK>;
340 				clocks = <&syscon ASPEED_CLK_SDIO>;
349 				clocks = <&syscon ASPEED_CLK_SDIO>;
368 				clocks = <&syscon ASPEED_CLK_APB>;
379 				clocks = <&syscon ASPEED_CLK_APB>;
399 				clocks = <&syscon ASPEED_CLK_APB>;
408 				clocks = <&syscon ASPEED_CLK_GATE_UART1CLK>;
419 				clocks = <&syscon ASPEED_CLK_GATE_UART5CLK>;
427 				clocks = <&syscon ASPEED_CLK_APB>;
433 				clocks = <&syscon ASPEED_CLK_APB>;
439 				clocks = <&syscon ASPEED_CLK_APB>;
448 				clocks = <&syscon ASPEED_CLK_24M>;
449 				resets = <&syscon ASPEED_RESET_PWM>;
458 				clocks = <&syscon ASPEED_CLK_APB>;
464 				compatible = "aspeed,ast2500-lpc-v2", "simple-mfd", "syscon";
476 					clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
484 					clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
492 					clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
500 					clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
507 					clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
515 					clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
541 					clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
557 				clocks = <&syscon ASPEED_CLK_GATE_REFCLK>;
558 				resets = <&syscon ASPEED_RESET_PECI>;
569 				clocks = <&syscon ASPEED_CLK_GATE_UART2CLK>;
580 				clocks = <&syscon ASPEED_CLK_GATE_UART3CLK>;
591 				clocks = <&syscon ASPEED_CLK_GATE_UART4CLK>;
617 		clocks = <&syscon ASPEED_CLK_APB>;
618 		resets = <&syscon ASPEED_RESET_I2C>;
632 		clocks = <&syscon ASPEED_CLK_APB>;
633 		resets = <&syscon ASPEED_RESET_I2C>;
647 		clocks = <&syscon ASPEED_CLK_APB>;
648 		resets = <&syscon ASPEED_RESET_I2C>;
663 		clocks = <&syscon ASPEED_CLK_APB>;
664 		resets = <&syscon ASPEED_RESET_I2C>;
679 		clocks = <&syscon ASPEED_CLK_APB>;
680 		resets = <&syscon ASPEED_RESET_I2C>;
695 		clocks = <&syscon ASPEED_CLK_APB>;
696 		resets = <&syscon ASPEED_RESET_I2C>;
711 		clocks = <&syscon ASPEED_CLK_APB>;
712 		resets = <&syscon ASPEED_RESET_I2C>;
727 		clocks = <&syscon ASPEED_CLK_APB>;
728 		resets = <&syscon ASPEED_RESET_I2C>;
743 		clocks = <&syscon ASPEED_CLK_APB>;
744 		resets = <&syscon ASPEED_RESET_I2C>;
759 		clocks = <&syscon ASPEED_CLK_APB>;
760 		resets = <&syscon ASPEED_RESET_I2C>;
775 		clocks = <&syscon ASPEED_CLK_APB>;
776 		resets = <&syscon ASPEED_RESET_I2C>;
791 		clocks = <&syscon ASPEED_CLK_APB>;
792 		resets = <&syscon ASPEED_RESET_I2C>;
807 		clocks = <&syscon ASPEED_CLK_APB>;
808 		resets = <&syscon ASPEED_RESET_I2C>;
823 		clocks = <&syscon ASPEED_CLK_APB>;
824 		resets = <&syscon ASPEED_RESET_I2C>;