Lines Matching refs:ccu
47 #include <dt-bindings/clock/sun8i-r40-ccu.h>
49 #include <dt-bindings/reset/sun8i-r40-ccu.h>
88 clocks = <&ccu CLK_CPU>;
97 clocks = <&ccu CLK_CPU>;
106 clocks = <&ccu CLK_CPU>;
115 clocks = <&ccu CLK_CPU>;
177 clocks = <&ccu CLK_BUS_DE>,
178 <&ccu CLK_DE>;
181 resets = <&ccu RST_BUS_DE>;
234 clocks = <&ccu CLK_BUS_DEINTERLACE>,
235 <&ccu CLK_DEINTERLACE>,
241 <&ccu CLK_DRAM_CSI1>;
243 resets = <&ccu RST_BUS_DEINTERLACE>;
285 clocks = <&ccu CLK_BUS_DMA>;
288 resets = <&ccu RST_BUS_DMA>;
297 clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
299 resets = <&ccu RST_BUS_SPI0>;
310 clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>;
312 resets = <&ccu RST_BUS_SPI1>;
323 clocks = <&ccu CLK_BUS_CSI0>, <&ccu CLK_CSI_SCLK>,
324 <&ccu CLK_DRAM_CSI0>;
326 resets = <&ccu RST_BUS_CSI0>;
335 clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>,
336 <&ccu CLK_DRAM_VE>;
338 resets = <&ccu RST_BUS_VE>;
347 clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>;
349 resets = <&ccu RST_BUS_MMC0>;
363 clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>;
365 resets = <&ccu RST_BUS_MMC1>;
377 clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
379 resets = <&ccu RST_BUS_MMC2>;
393 clocks = <&ccu CLK_BUS_MMC3>, <&ccu CLK_MMC3>;
395 resets = <&ccu RST_BUS_MMC3>;
415 clocks = <&ccu CLK_USB_PHY0>,
416 <&ccu CLK_USB_PHY1>,
417 <&ccu CLK_USB_PHY2>;
421 resets = <&ccu RST_USB_PHY0>,
422 <&ccu RST_USB_PHY1>,
423 <&ccu RST_USB_PHY2>;
435 clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>;
437 resets = <&ccu RST_BUS_CE>;
445 clocks = <&ccu CLK_BUS_SPI2>, <&ccu CLK_SPI2>;
447 resets = <&ccu RST_BUS_SPI2>;
457 clocks = <&ccu CLK_BUS_SATA>, <&ccu CLK_SATA>;
458 resets = <&ccu RST_BUS_SATA>;
467 clocks = <&ccu CLK_BUS_EHCI1>;
468 resets = <&ccu RST_BUS_EHCI1>;
478 clocks = <&ccu CLK_BUS_OHCI1>,
479 <&ccu CLK_USB_OHCI1>;
480 resets = <&ccu RST_BUS_OHCI1>;
490 clocks = <&ccu CLK_BUS_EHCI2>;
491 resets = <&ccu RST_BUS_EHCI2>;
501 clocks = <&ccu CLK_BUS_OHCI2>,
502 <&ccu CLK_USB_OHCI2>;
503 resets = <&ccu RST_BUS_OHCI2>;
514 clocks = <&ccu CLK_BUS_SPI3>, <&ccu CLK_SPI3>;
516 resets = <&ccu RST_BUS_SPI3>;
522 ccu: clock@1c20000 { label
523 compatible = "allwinner,sun8i-r40-ccu";
544 clocks = <&ccu CLK_BUS_PIO>, <&osc24M>,
767 clocks = <&ccu CLK_BUS_IR0>, <&ccu CLK_IR0>;
770 resets = <&ccu RST_BUS_IR0>;
780 clocks = <&ccu CLK_BUS_IR1>, <&ccu CLK_IR1>;
783 resets = <&ccu RST_BUS_IR1>;
793 clocks = <&ccu CLK_BUS_I2S0>, <&ccu CLK_I2S0>;
795 resets = <&ccu RST_BUS_I2S0>;
806 clocks = <&ccu CLK_BUS_I2S1>, <&ccu CLK_I2S1>;
808 resets = <&ccu RST_BUS_I2S1>;
819 clocks = <&ccu CLK_BUS_I2S2>, <&ccu CLK_I2S2>;
821 resets = <&ccu RST_BUS_I2S2>;
829 clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_THS>;
832 resets = <&ccu RST_BUS_THS>;
843 clocks = <&ccu CLK_BUS_UART0>;
844 resets = <&ccu RST_BUS_UART0>;
854 clocks = <&ccu CLK_BUS_UART1>;
855 resets = <&ccu RST_BUS_UART1>;
865 clocks = <&ccu CLK_BUS_UART2>;
866 resets = <&ccu RST_BUS_UART2>;
876 clocks = <&ccu CLK_BUS_UART3>;
877 resets = <&ccu RST_BUS_UART3>;
887 clocks = <&ccu CLK_BUS_UART4>;
888 resets = <&ccu RST_BUS_UART4>;
898 clocks = <&ccu CLK_BUS_UART5>;
899 resets = <&ccu RST_BUS_UART5>;
909 clocks = <&ccu CLK_BUS_UART6>;
910 resets = <&ccu RST_BUS_UART6>;
920 clocks = <&ccu CLK_BUS_UART7>;
921 resets = <&ccu RST_BUS_UART7>;
929 clocks = <&ccu CLK_BUS_I2C0>;
930 resets = <&ccu RST_BUS_I2C0>;
942 clocks = <&ccu CLK_BUS_I2C1>;
943 resets = <&ccu RST_BUS_I2C1>;
955 clocks = <&ccu CLK_BUS_I2C2>;
956 resets = <&ccu RST_BUS_I2C2>;
968 clocks = <&ccu CLK_BUS_I2C3>;
969 resets = <&ccu RST_BUS_I2C3>;
981 clocks = <&ccu CLK_BUS_CAN>;
982 resets = <&ccu RST_BUS_CAN>;
990 clocks = <&ccu CLK_BUS_I2C4>;
991 resets = <&ccu RST_BUS_I2C4>;
1016 clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>;
1018 resets = <&ccu RST_BUS_GPU>;
1023 syscon = <&ccu>;
1027 resets = <&ccu RST_BUS_GMAC>;
1029 clocks = <&ccu CLK_BUS_GMAC>;
1043 clocks = <&ccu 155>;
1053 clocks = <&ccu CLK_BUS_TCON_TOP>,
1054 <&ccu CLK_TCON_TV0>,
1055 <&ccu CLK_TVE0>,
1056 <&ccu CLK_TCON_TV1>,
1057 <&ccu CLK_TVE1>,
1058 <&ccu CLK_DSI_DPHY>;
1068 resets = <&ccu RST_BUS_TCON_TOP>;
1172 clocks = <&ccu CLK_BUS_TCON_TV0>, <&tcon_top CLK_TCON_TOP_TV0>;
1174 resets = <&ccu RST_BUS_TCON_TV0>;
1215 clocks = <&ccu CLK_BUS_TCON_TV1>, <&tcon_top CLK_TCON_TOP_TV1>;
1217 resets = <&ccu RST_BUS_TCON_TV1>;
1271 clocks = <&ccu CLK_BUS_HDMI0>, <&ccu CLK_HDMI_SLOW>,
1272 <&ccu CLK_HDMI>, <&rtc CLK_OSC32K>;
1274 resets = <&ccu RST_BUS_HDMI1>;
1301 clocks = <&ccu CLK_BUS_HDMI1>, <&ccu CLK_HDMI_SLOW>,
1302 <&ccu CLK_PLL_VIDEO0>, <&ccu CLK_PLL_VIDEO1>;
1304 resets = <&ccu RST_BUS_HDMI0>;