Lines Matching +full:sun4i +full:- +full:a10 +full:- +full:ehci
2 * Copyright 2017 Chen-Yu Tsai <wens@csie.org>
5 * This file is dual-licensed: you can use it either under the terms
44 #include <dt-bindings/interrupt-controller/arm-gic.h>
45 #include <dt-bindings/clock/sun6i-rtc.h>
46 #include <dt-bindings/clock/sun8i-de2.h>
47 #include <dt-bindings/clock/sun8i-r40-ccu.h>
48 #include <dt-bindings/clock/sun8i-tcon-top.h>
49 #include <dt-bindings/reset/sun8i-r40-ccu.h>
50 #include <dt-bindings/reset/sun8i-de2.h>
51 #include <dt-bindings/thermal/thermal.h>
54 #address-cells = <1>;
55 #size-cells = <1>;
56 interrupt-parent = <&gic>;
59 #address-cells = <1>;
60 #size-cells = <1>;
64 #clock-cells = <0>;
65 compatible = "fixed-clock";
66 clock-frequency = <24000000>;
67 clock-accuracy = <50000>;
68 clock-output-names = "osc24M";
72 #clock-cells = <0>;
73 compatible = "fixed-clock";
74 clock-frequency = <32768>;
75 clock-accuracy = <20000>;
76 clock-output-names = "ext-osc32k";
81 #address-cells = <1>;
82 #size-cells = <0>;
85 compatible = "arm,cortex-a7";
89 clock-names = "cpu";
90 #cooling-cells = <2>;
94 compatible = "arm,cortex-a7";
98 clock-names = "cpu";
99 #cooling-cells = <2>;
103 compatible = "arm,cortex-a7";
107 clock-names = "cpu";
108 #cooling-cells = <2>;
112 compatible = "arm,cortex-a7";
116 clock-names = "cpu";
117 #cooling-cells = <2>;
121 de: display-engine {
122 compatible = "allwinner,sun8i-r40-display-engine";
127 thermal-zones {
128 cpu_thermal: cpu0-thermal {
130 polling-delay-passive = <0>;
131 polling-delay = <0>;
132 thermal-sensors = <&ths 0>;
135 cpu_hot_trip: cpu-hot {
141 cpu_very_hot_trip: cpu-very-hot {
148 cooling-maps {
149 cpu-hot-limit {
151 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
159 gpu_thermal: gpu-thermal {
161 polling-delay-passive = <0>;
162 polling-delay = <0>;
163 thermal-sensors = <&ths 1>;
168 compatible = "simple-bus";
169 #address-cells = <1>;
170 #size-cells = <1>;
174 compatible = "allwinner,sun8i-r40-de2-clk",
175 "allwinner,sun8i-h3-de2-clk";
179 clock-names = "bus",
182 #clock-cells = <1>;
183 #reset-cells = <1>;
187 compatible = "allwinner,sun8i-r40-de2-mixer-0";
191 clock-names = "bus",
196 #address-cells = <1>;
197 #size-cells = <0>;
202 remote-endpoint = <&tcon_top_mixer0_in_mixer0>;
209 compatible = "allwinner,sun8i-r40-de2-mixer-1";
213 clock-names = "bus",
218 #address-cells = <1>;
219 #size-cells = <0>;
224 remote-endpoint = <&tcon_top_mixer1_in_mixer1>;
231 compatible = "allwinner,sun8i-r40-deinterlace",
232 "allwinner,sun8i-h3-deinterlace";
242 clock-names = "bus", "mod", "ram";
246 interconnect-names = "dma-mem";
249 syscon: system-control@1c00000 {
250 compatible = "allwinner,sun8i-r40-system-control",
251 "allwinner,sun4i-a10-system-control";
253 #address-cells = <1>;
254 #size-cells = <1>;
258 compatible = "mmio-sram";
260 #address-cells = <1>;
261 #size-cells = <1>;
264 ve_sram: sram-section@0 {
265 compatible = "allwinner,sun8i-r40-sram-c1",
266 "allwinner,sun4i-a10-sram-c1";
272 nmi_intc: interrupt-controller@1c00030 {
273 compatible = "allwinner,sun7i-a20-sc-nmi";
274 interrupt-controller;
275 #interrupt-cells = <2>;
280 dma: dma-controller@1c02000 {
281 compatible = "allwinner,sun8i-r40-dma",
282 "allwinner,sun50i-a64-dma";
286 dma-channels = <16>;
287 dma-requests = <31>;
289 #dma-cells = <1>;
293 compatible = "allwinner,sun8i-r40-spi",
294 "allwinner,sun8i-h3-spi";
298 clock-names = "ahb", "mod";
301 #address-cells = <1>;
302 #size-cells = <0>;
306 compatible = "allwinner,sun8i-r40-spi",
307 "allwinner,sun8i-h3-spi";
311 clock-names = "ahb", "mod";
314 #address-cells = <1>;
315 #size-cells = <0>;
319 compatible = "allwinner,sun8i-r40-csi0",
320 "allwinner,sun7i-a20-csi0";
325 clock-names = "bus", "isp", "ram";
328 interconnect-names = "dma-mem";
332 video-codec@1c0e000 {
333 compatible = "allwinner,sun8i-r40-video-engine";
337 clock-names = "ahb", "mod", "ram";
344 compatible = "allwinner,sun8i-r40-mmc",
345 "allwinner,sun50i-a64-mmc";
348 clock-names = "ahb", "mmc";
350 reset-names = "ahb";
351 pinctrl-0 = <&mmc0_pins>;
352 pinctrl-names = "default";
355 #address-cells = <1>;
356 #size-cells = <0>;
360 compatible = "allwinner,sun8i-r40-mmc",
361 "allwinner,sun50i-a64-mmc";
364 clock-names = "ahb", "mmc";
366 reset-names = "ahb";
369 #address-cells = <1>;
370 #size-cells = <0>;
374 compatible = "allwinner,sun8i-r40-emmc",
375 "allwinner,sun50i-a64-emmc";
378 clock-names = "ahb", "mmc";
380 reset-names = "ahb";
381 pinctrl-0 = <&mmc2_pins>;
382 pinctrl-names = "default";
385 #address-cells = <1>;
386 #size-cells = <0>;
390 compatible = "allwinner,sun8i-r40-mmc",
391 "allwinner,sun50i-a64-mmc";
394 clock-names = "ahb", "mmc";
396 reset-names = "ahb";
397 pinctrl-0 = <&mmc3_pins>;
398 pinctrl-names = "default";
401 #address-cells = <1>;
402 #size-cells = <0>;
406 compatible = "allwinner,sun8i-r40-usb-phy";
411 reg-names = "phy_ctrl",
418 clock-names = "usb0_phy",
424 reset-names = "usb0_reset",
428 #phy-cells = <1>;
432 compatible = "allwinner,sun8i-r40-crypto";
436 clock-names = "bus", "mod";
441 compatible = "allwinner,sun8i-r40-spi",
442 "allwinner,sun8i-h3-spi";
446 clock-names = "ahb", "mod";
449 #address-cells = <1>;
450 #size-cells = <0>;
454 compatible = "allwinner,sun8i-r40-ahci";
459 reset-names = "ahci";
464 compatible = "allwinner,sun8i-r40-ehci", "generic-ehci";
470 phy-names = "usb";
475 compatible = "allwinner,sun8i-r40-ohci", "generic-ohci";
482 phy-names = "usb";
487 compatible = "allwinner,sun8i-r40-ehci", "generic-ehci";
493 phy-names = "usb";
498 compatible = "allwinner,sun8i-r40-ohci", "generic-ohci";
505 phy-names = "usb";
510 compatible = "allwinner,sun8i-r40-spi",
511 "allwinner,sun8i-h3-spi";
515 clock-names = "ahb", "mod";
518 #address-cells = <1>;
519 #size-cells = <0>;
523 compatible = "allwinner,sun8i-r40-ccu";
526 clock-names = "hosc", "losc";
527 #clock-cells = <1>;
528 #reset-cells = <1>;
532 compatible = "allwinner,sun8i-r40-rtc";
535 clock-output-names = "osc32k", "osc32k-out";
537 #clock-cells = <1>;
541 compatible = "allwinner,sun8i-r40-pinctrl";
546 clock-names = "apb", "hosc", "losc";
547 gpio-controller;
548 interrupt-controller;
549 #interrupt-cells = <3>;
550 #gpio-cells = <3>;
552 can_ph_pins: can-ph-pins {
557 can_pa_pins: can-pa-pins {
562 clk_out_a_pin: clk-out-a-pin {
567 /omit-if-no-ref/
568 csi0_8bits_pins: csi0-8bits-pins {
575 /omit-if-no-ref/
576 csi0_mclk_pin: csi0-mclk-pin {
581 gmac_rgmii_pins: gmac-rgmii-pins {
591 drive-strength = <40>;
594 i2c0_pins: i2c0-pins {
599 i2c1_pins: i2c1-pins {
604 i2c2_pins: i2c2-pins {
609 i2c3_pins: i2c3-pins {
614 i2c4_pins: i2c4-pins {
619 ir0_pins: ir0-pins {
624 ir1_pins: ir1-pins {
629 mmc0_pins: mmc0-pins {
633 drive-strength = <30>;
634 bias-pull-up;
637 mmc1_pg_pins: mmc1-pg-pins {
641 drive-strength = <30>;
642 bias-pull-up;
645 mmc2_pins: mmc2-pins {
650 drive-strength = <30>;
651 bias-pull-up;
654 /omit-if-no-ref/
655 mmc3_pins: mmc3-pins {
659 drive-strength = <30>;
660 bias-pull-up;
663 /omit-if-no-ref/
664 spi0_pc_pins: spi0-pc-pins {
669 /omit-if-no-ref/
670 spi0_cs0_pc_pin: spi0-cs0-pc-pin {
675 /omit-if-no-ref/
676 spi1_pi_pins: spi1-pi-pins {
681 /omit-if-no-ref/
682 spi1_cs0_pi_pin: spi1-cs0-pi-pin {
687 /omit-if-no-ref/
688 spi1_cs1_pi_pin: spi1-cs1-pi-pin {
693 /omit-if-no-ref/
694 uart0_pb_pins: uart0-pb-pins {
699 /omit-if-no-ref/
700 uart2_pi_pins: uart2-pi-pins {
705 /omit-if-no-ref/
706 uart2_rts_cts_pi_pins: uart2-rts-cts-pi-pins{
711 /omit-if-no-ref/
712 uart3_pg_pins: uart3-pg-pins {
717 /omit-if-no-ref/
718 uart3_rts_cts_pg_pins: uart3-rts-cts-pg-pins {
723 /omit-if-no-ref/
724 uart4_pg_pins: uart4-pg-pins {
729 /omit-if-no-ref/
730 uart5_ph_pins: uart5-ph-pins {
735 /omit-if-no-ref/
736 uart7_pi_pins: uart7-pi-pins {
743 compatible = "allwinner,sun4i-a10-timer";
755 compatible = "allwinner,sun4i-a10-wdt";
762 compatible = "allwinner,sun8i-r40-ir",
763 "allwinner,sun6i-a31-ir";
765 pinctrl-0 = <&ir0_pins>;
766 pinctrl-names = "default";
768 clock-names = "apb", "ir";
775 compatible = "allwinner,sun8i-r40-ir",
776 "allwinner,sun6i-a31-ir";
778 pinctrl-0 = <&ir1_pins>;
779 pinctrl-names = "default";
781 clock-names = "apb", "ir";
788 #sound-dai-cells = <0>;
789 compatible = "allwinner,sun8i-r40-i2s",
790 "allwinner,sun8i-h3-i2s";
794 clock-names = "apb", "mod";
797 dma-names = "rx", "tx";
801 #sound-dai-cells = <0>;
802 compatible = "allwinner,sun8i-r40-i2s",
803 "allwinner,sun8i-h3-i2s";
807 clock-names = "apb", "mod";
810 dma-names = "rx", "tx";
814 #sound-dai-cells = <0>;
815 compatible = "allwinner,sun8i-r40-i2s",
816 "allwinner,sun8i-h3-i2s";
820 clock-names = "apb", "mod";
823 dma-names = "rx", "tx";
826 ths: thermal-sensor@1c24c00 {
827 compatible = "allwinner,sun8i-r40-ths";
830 clock-names = "bus", "mod";
833 /* TODO: add nvmem-cells for calibration */
834 #thermal-sensor-cells = <1>;
838 compatible = "snps,dw-apb-uart";
841 reg-shift = <2>;
842 reg-io-width = <4>;
849 compatible = "snps,dw-apb-uart";
852 reg-shift = <2>;
853 reg-io-width = <4>;
860 compatible = "snps,dw-apb-uart";
863 reg-shift = <2>;
864 reg-io-width = <4>;
871 compatible = "snps,dw-apb-uart";
874 reg-shift = <2>;
875 reg-io-width = <4>;
882 compatible = "snps,dw-apb-uart";
885 reg-shift = <2>;
886 reg-io-width = <4>;
893 compatible = "snps,dw-apb-uart";
896 reg-shift = <2>;
897 reg-io-width = <4>;
904 compatible = "snps,dw-apb-uart";
907 reg-shift = <2>;
908 reg-io-width = <4>;
915 compatible = "snps,dw-apb-uart";
918 reg-shift = <2>;
919 reg-io-width = <4>;
926 compatible = "allwinner,sun6i-a31-i2c";
931 pinctrl-0 = <&i2c0_pins>;
932 pinctrl-names = "default";
934 #address-cells = <1>;
935 #size-cells = <0>;
939 compatible = "allwinner,sun6i-a31-i2c";
944 pinctrl-0 = <&i2c1_pins>;
945 pinctrl-names = "default";
947 #address-cells = <1>;
948 #size-cells = <0>;
952 compatible = "allwinner,sun6i-a31-i2c";
957 pinctrl-0 = <&i2c2_pins>;
958 pinctrl-names = "default";
960 #address-cells = <1>;
961 #size-cells = <0>;
965 compatible = "allwinner,sun6i-a31-i2c";
970 pinctrl-0 = <&i2c3_pins>;
971 pinctrl-names = "default";
973 #address-cells = <1>;
974 #size-cells = <0>;
978 compatible = "allwinner,sun8i-r40-can";
987 compatible = "allwinner,sun6i-a31-i2c";
992 pinctrl-0 = <&i2c4_pins>;
993 pinctrl-names = "default";
995 #address-cells = <1>;
996 #size-cells = <0>;
1000 compatible = "allwinner,sun8i-r40-mali", "arm,mali-400";
1009 interrupt-names = "gp",
1017 clock-names = "bus", "core";
1022 compatible = "allwinner,sun8i-r40-gmac";
1026 interrupt-names = "macirq";
1028 reset-names = "stmmaceth";
1030 clock-names = "stmmaceth";
1034 compatible = "snps,dwmac-mdio";
1035 #address-cells = <1>;
1036 #size-cells = <0>;
1040 mbus: dram-controller@1c62000 {
1041 compatible = "allwinner,sun8i-r40-mbus";
1044 #address-cells = <1>;
1045 #size-cells = <1>;
1046 dma-ranges = <0x00000000 0x40000000 0x80000000>;
1047 #interconnect-cells = <1>;
1050 tcon_top: tcon-top@1c70000 {
1051 compatible = "allwinner,sun8i-r40-tcon-top";
1059 clock-names = "bus",
1060 "tcon-tv0",
1062 "tcon-tv1",
1065 clock-output-names = "tcon-top-tv0",
1066 "tcon-top-tv1",
1067 "tcon-top-dsi";
1069 #clock-cells = <1>;
1072 #address-cells = <1>;
1073 #size-cells = <0>;
1079 remote-endpoint = <&mixer0_out_tcon_top>;
1084 #address-cells = <1>;
1085 #size-cells = <0>;
1098 remote-endpoint = <&tcon_tv0_in_tcon_top_mixer0>;
1103 remote-endpoint = <&tcon_tv1_in_tcon_top_mixer0>;
1108 #address-cells = <1>;
1109 #size-cells = <0>;
1114 remote-endpoint = <&mixer1_out_tcon_top>;
1119 #address-cells = <1>;
1120 #size-cells = <0>;
1133 remote-endpoint = <&tcon_tv0_in_tcon_top_mixer1>;
1138 remote-endpoint = <&tcon_tv1_in_tcon_top_mixer1>;
1143 #address-cells = <1>;
1144 #size-cells = <0>;
1149 remote-endpoint = <&tcon_tv0_out_tcon_top>;
1154 remote-endpoint = <&tcon_tv1_out_tcon_top>;
1162 remote-endpoint = <&hdmi_in_tcon_top>;
1168 tcon_tv0: lcd-controller@1c73000 {
1169 compatible = "allwinner,sun8i-r40-tcon-tv";
1173 clock-names = "ahb", "tcon-ch1";
1175 reset-names = "lcd";
1179 #address-cells = <1>;
1180 #size-cells = <0>;
1183 #address-cells = <1>;
1184 #size-cells = <0>;
1189 remote-endpoint = <&tcon_top_mixer0_out_tcon_tv0>;
1194 remote-endpoint = <&tcon_top_mixer1_out_tcon_tv0>;
1199 #address-cells = <1>;
1200 #size-cells = <0>;
1205 remote-endpoint = <&tcon_top_hdmi_in_tcon_tv0>;
1211 tcon_tv1: lcd-controller@1c74000 {
1212 compatible = "allwinner,sun8i-r40-tcon-tv";
1216 clock-names = "ahb", "tcon-ch1";
1218 reset-names = "lcd";
1222 #address-cells = <1>;
1223 #size-cells = <0>;
1226 #address-cells = <1>;
1227 #size-cells = <0>;
1232 remote-endpoint = <&tcon_top_mixer0_out_tcon_tv1>;
1237 remote-endpoint = <&tcon_top_mixer1_out_tcon_tv1>;
1242 #address-cells = <1>;
1243 #size-cells = <0>;
1248 remote-endpoint = <&tcon_top_hdmi_in_tcon_tv1>;
1254 gic: interrupt-controller@1c81000 {
1255 compatible = "arm,gic-400";
1260 interrupt-controller;
1261 #interrupt-cells = <3>;
1266 compatible = "allwinner,sun8i-r40-dw-hdmi",
1267 "allwinner,sun8i-a83t-dw-hdmi";
1269 reg-io-width = <1>;
1273 clock-names = "iahb", "isfr", "tmds", "cec";
1275 reset-names = "ctrl";
1277 phy-names = "phy";
1281 #address-cells = <1>;
1282 #size-cells = <0>;
1288 remote-endpoint = <&tcon_top_hdmi_out_hdmi>;
1298 hdmi_phy: hdmi-phy@1ef0000 {
1299 compatible = "allwinner,sun8i-r40-hdmi-phy";
1303 clock-names = "bus", "mod", "pll-0", "pll-1";
1305 reset-names = "phy";
1306 #phy-cells = <0>;
1311 compatible = "arm,cortex-a7-pmu";
1316 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
1320 compatible = "arm,armv7-timer";