Lines Matching refs:ccu
48 #include <dt-bindings/clock/sun7i-a20-ccu.h>
49 #include <dt-bindings/reset/sun4i-a10-ccu.h>
70 clocks = <&ccu CLK_AHB_LCD0>, <&ccu CLK_AHB_HDMI0>,
71 <&ccu CLK_AHB_DE_BE0>, <&ccu CLK_DE_BE0>,
72 <&ccu CLK_TCON0_CH1>, <&ccu CLK_DRAM_DE_BE0>,
73 <&ccu CLK_HDMI>;
81 clocks = <&ccu CLK_AHB_LCD0>, <&ccu CLK_AHB_DE_BE0>,
82 <&ccu CLK_DE_BE0>, <&ccu CLK_TCON0_CH0>,
83 <&ccu CLK_DRAM_DE_BE0>;
91 clocks = <&ccu CLK_AHB_TVE0>, <&ccu CLK_AHB_LCD0>,
92 <&ccu CLK_AHB_DE_BE0>,
93 <&ccu CLK_DE_BE0>, <&ccu CLK_TCON0_CH1>,
94 <&ccu CLK_DRAM_TVE0>, <&ccu CLK_DRAM_DE_BE0>;
107 clocks = <&ccu CLK_CPU>;
125 clocks = <&ccu CLK_CPU>;
331 clocks = <&ccu CLK_AHB_DMA>;
339 clocks = <&ccu CLK_AHB_NAND>, <&ccu CLK_NAND>;
352 clocks = <&ccu CLK_AHB_SPI0>, <&ccu CLK_SPI0>;
367 clocks = <&ccu CLK_AHB_SPI1>, <&ccu CLK_SPI1>;
382 clocks = <&ccu CLK_AHB_CSI0>, <&ccu CLK_CSI_SCLK>, <&ccu CLK_DRAM_CSI0>;
384 resets = <&ccu RST_CSI0>;
392 clocks = <&ccu CLK_AHB_EMAC>;
410 resets = <&ccu RST_TCON0>, <&ccu RST_LVDS>;
412 clocks = <&ccu CLK_AHB_LCD0>,
413 <&ccu CLK_TCON0_CH0>,
414 <&ccu CLK_TCON0_CH1>;
461 resets = <&ccu RST_TCON1>;
463 clocks = <&ccu CLK_AHB_LCD1>,
464 <&ccu CLK_TCON1_CH0>,
465 <&ccu CLK_TCON1_CH1>;
510 clocks = <&ccu CLK_AHB_VE>, <&ccu CLK_VE>,
511 <&ccu CLK_DRAM_VE>;
513 resets = <&ccu RST_VE>;
521 clocks = <&ccu CLK_AHB_MMC0>,
522 <&ccu CLK_MMC0>,
523 <&ccu CLK_MMC0_OUTPUT>,
524 <&ccu CLK_MMC0_SAMPLE>;
540 clocks = <&ccu CLK_AHB_MMC1>,
541 <&ccu CLK_MMC1>,
542 <&ccu CLK_MMC1_OUTPUT>,
543 <&ccu CLK_MMC1_SAMPLE>;
557 clocks = <&ccu CLK_AHB_MMC2>,
558 <&ccu CLK_MMC2>,
559 <&ccu CLK_MMC2_OUTPUT>,
560 <&ccu CLK_MMC2_SAMPLE>;
576 clocks = <&ccu CLK_AHB_MMC3>,
577 <&ccu CLK_MMC3>,
578 <&ccu CLK_MMC3_OUTPUT>,
579 <&ccu CLK_MMC3_SAMPLE>;
595 clocks = <&ccu CLK_AHB_OTG>;
611 clocks = <&ccu CLK_USB_PHY>;
613 resets = <&ccu RST_USB_PHY0>,
614 <&ccu RST_USB_PHY1>,
615 <&ccu RST_USB_PHY2>;
624 clocks = <&ccu CLK_AHB_EHCI0>;
634 clocks = <&ccu CLK_USB_OHCI0>, <&ccu CLK_AHB_OHCI0>;
645 clocks = <&ccu CLK_AHB_SS>, <&ccu CLK_SS>;
654 clocks = <&ccu CLK_AHB_HDMI0>, <&ccu CLK_HDMI>,
655 <&ccu CLK_PLL_VIDEO0_2X>,
656 <&ccu CLK_PLL_VIDEO1_2X>;
694 clocks = <&ccu CLK_AHB_SPI2>, <&ccu CLK_SPI2>;
709 clocks = <&ccu CLK_AHB_SATA>, <&ccu CLK_SATA>;
717 clocks = <&ccu CLK_AHB_EHCI1>;
727 clocks = <&ccu CLK_USB_OHCI1>, <&ccu CLK_AHB_OHCI1>;
738 clocks = <&ccu CLK_AHB_CSI1>, <&ccu CLK_DRAM_CSI1>;
740 resets = <&ccu RST_CSI1>;
748 clocks = <&ccu CLK_AHB_SPI3>, <&ccu CLK_SPI3>;
759 ccu: clock@1c20000 { label
760 compatible = "allwinner,sun7i-a20-ccu";
772 clocks = <&ccu CLK_APB0_PIO>, <&osc24M>, <&osc32k>;
1220 clocks = <&ccu CLK_APB0_SPDIF>, <&ccu CLK_SPDIF>;
1230 clocks = <&ccu CLK_APB0_IR0>, <&ccu CLK_IR0>;
1239 clocks = <&ccu CLK_APB0_IR1>, <&ccu CLK_IR1>;
1251 clocks = <&ccu CLK_APB0_I2S1>, <&ccu CLK_I2S1>;
1264 clocks = <&ccu CLK_APB0_I2S0>, <&ccu CLK_I2S0>;
1284 clocks = <&ccu CLK_APB0_CODEC>, <&ccu CLK_CODEC>;
1302 clocks = <&ccu CLK_APB0_I2S2>, <&ccu CLK_I2S2>;
1323 clocks = <&ccu CLK_APB1_UART0>;
1333 clocks = <&ccu CLK_APB1_UART1>;
1343 clocks = <&ccu CLK_APB1_UART2>;
1353 clocks = <&ccu CLK_APB1_UART3>;
1363 clocks = <&ccu CLK_APB1_UART4>;
1373 clocks = <&ccu CLK_APB1_UART5>;
1383 clocks = <&ccu CLK_APB1_UART6>;
1393 clocks = <&ccu CLK_APB1_UART7>;
1401 clocks = <&ccu CLK_APB1_PS20>;
1409 clocks = <&ccu CLK_APB1_PS21>;
1418 clocks = <&ccu CLK_APB1_I2C0>;
1431 clocks = <&ccu CLK_APB1_I2C1>;
1444 clocks = <&ccu CLK_APB1_I2C2>;
1457 clocks = <&ccu CLK_APB1_I2C3>;
1470 clocks = <&ccu CLK_APB1_CAN>;
1479 clocks = <&ccu CLK_APB1_I2C4>;
1502 clocks = <&ccu CLK_AHB_GPU>, <&ccu CLK_GPU>;
1504 resets = <&ccu RST_GPU>;
1506 assigned-clocks = <&ccu CLK_GPU>;
1515 clocks = <&ccu CLK_AHB_GMAC>, <&gmac_tx_clk>;
1536 clocks = <&ccu CLK_AHB_HSTIMER>;
1554 clocks = <&ccu CLK_AHB_DE_FE0>, <&ccu CLK_DE_FE0>,
1555 <&ccu CLK_DRAM_DE_FE0>;
1558 resets = <&ccu RST_DE_FE0>;
1586 clocks = <&ccu CLK_AHB_DE_FE1>, <&ccu CLK_DE_FE1>,
1587 <&ccu CLK_DRAM_DE_FE1>;
1590 resets = <&ccu RST_DE_FE1>;
1618 clocks = <&ccu CLK_AHB_DE_BE1>, <&ccu CLK_DE_BE1>,
1619 <&ccu CLK_DRAM_DE_BE1>;
1622 resets = <&ccu RST_DE_BE1>;
1666 clocks = <&ccu CLK_AHB_DE_BE0>, <&ccu CLK_DE_BE0>,
1667 <&ccu CLK_DRAM_DE_BE0>;
1670 resets = <&ccu RST_DE_BE0>;