Lines Matching full:uart0
132 bool "Kernel low-level debugging messages via Alpine UART0"
149 0x80000000 | 0xf0000000 | UART0
520 bool "Kernel low-level debugging on KEYSTONE2 using UART0"
525 their output to UART0 serial port on KEYSTONE2 devices.
536 bool "Kernel low-level debugging via LPC18xx/43xx UART0"
541 on NXP LPC18xx/43xx UART0.
575 bool "Kernel low-level debugging messages via MVEBU UART0 (old bootloaders)"
581 on MVEBU based platforms on UART0.
599 bool "Kernel low-level debugging messages via MVEBU UART0 (new bootloaders)"
604 on MVEBU based platforms on UART0. (Armada XP, Armada 3xx,
642 bool "Mediatek mt6589 UART0"
647 for Mediatek mt6589 based platforms on UART0.
650 bool "Mediatek mt8127/mt6592 UART0"
655 for Mediatek mt8127 based platforms on UART0.
825 bool "Kernel low-level debugging messages via Rockchip RV1108 UART0"
849 bool "Kernel low-level debugging messages via Rockchip RK29 UART0"
873 bool "Kernel low-level debugging messages via Rockchip RK30/RK31 UART0"
1068 bool "Use SOCFPGA UART0 for low-level debug"
1091 bool "Kernel low-level debugging messages via sun9i UART0"
1096 on Allwinner A80 based platforms on the UART0.
1099 bool "Kernel low-level debugging messages via sunXi UART0"
1104 on Allwinner A1X based platforms on the UART0.
1284 bool "Autodetect UART0 on Versatile Express Cortex-A core tiles"
1289 choose the relevant UART0 base address.
1295 bool "Use PL011 UART0 at 0x10009000 (V2P-CA9 core tile)"
1299 This option selects UART0 at 0x10009000. Except for custom models,
1303 bool "Use PL011 UART0 at 0x1c090000 (RS1 complaint tiles)"
1307 This option selects UART0 at 0x1c090000. This applies to most
1312 bool "Use PL011 UART0 at 0xb0090000 (Cortex-R compliant tiles)"
1316 This option selects UART0 at 0xb0090000. This is appropriate for
1327 bool "Use UART0 on VIA/Wondermedia SoCs"
1330 This option selects UART0 on VIA/Wondermedia System-on-a-chip
1334 bool "Kernel low-level debugging on Xilinx Zynq using UART0"
1338 their output to UART0 on the Zynq platform.