Lines Matching refs:Memory
147 | CPU 1 |<----->| Memory |<----->| CPU 2 |
235 제공하는데(Memory mapped I/O), 해당 컨트롤 레지스터에 접근하는 순서는 매우
2649 <--- CPU ---> : <----------- Memory ----------->
2653 | CPU | | Memory | : | CPU | | | | |
2655 | | | Queue | : | | | |--->| Memory |
2663 | CPU | | Memory | : | CPU | | |--->| Device |
2720 Memory mapped I/O 는 일반적으로 CPU 의 메모리 공간 내의 한 윈도우의 특정 부분
2905 Chapter 7.1: Memory-Access Ordering
2906 Chapter 7.4: Buffering and Combining Memory Writes
2909 Chapter B2: The AArch64 Application Level Memory Model
2914 Chapter 7.2: Memory Ordering
2918 Chapter 8: Memory Models
2919 Appendix D: Formal Specification of the Memory Models
2920 Appendix J: Programming with the Memory Models
2925 Chapter 5: Memory Accesses and Cacheability
2926 Chapter 15: Sparc-V9 Memory Models
2929 Chapter 9: Memory Models
2932 Chapter 8: Memory Models
2935 Chapter 9: Memory
2936 Appendix D: Formal Specifications of the Memory Models
2939 Chapter 8: Memory Models
2948 Chapter 13: Other Memory Models
2952 Section 4.4: Memory Access