driver-api/rapidio/tsi721.rst

2 RapidIO subsystem mport driver for IDT Tsi721 PCI Express-to-SRIO bridge.
10 doorbells, inbound maintenance port-writes and RapidIO messaging.
13 channels. This mechanism provides access to larger range of hop counts and
16 RapidIO messaging support uses dedicated messaging channels for each mailbox.
23 - 'dbg_level'
24       - This parameter allows to control amount of debug information
32 - 'dma_desc_per_channel'
33       - This parameter defines number of hardware buffer
37 - 'dma_txqueue_sz'
38       - DMA transactions queue size. Defines number of pending
42 - 'dma_sel'
43       - DMA channel selection mask. Bitmask that defines which hardware
44         DMA channels (0 ... 6) will be registered with DmaEngine core.
46         DMA channels not selected by this mask will not be used by this device
47         driver. Default value is 0x7f (use all channels).
49 - 'pcie_mrrs'
50       - override value for PCIe Maximum Read Request Size (MRRS).
55         Default value is '-1' (= keep platform setting).
57 - 'mbox_sel'
58       - RIO messaging MBOX selection mask. This is a bitmask that defines
59         messaging MBOXes are managed by this device driver. Mask bits 0 - 3
60         correspond to MBOX0 - MBOX3. MBOX is under driver's control if the
77 out of eight available BDMA channels to support DMA data transfers.
78 One BDMA channel is reserved for generation of maintenance read/write requests.
81 this driver will accept DMA-specific module parameter:
84 			 - defines number of hardware buffer descriptors used by
85                            each BDMA channel of Tsi721 (by default - 128).
90   1.1.0   DMA operations re-worked to support data scatter/gather lists larger
98   Copyright(c) 2011 Integrated Device Technology, Inc. All rights reserved.
112   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.