Lines Matching +full:as +full:- +full:is
11 What is a GPIO?
13 A "General Purpose Input/Output" (GPIO) is a flexible software-controlled
21 System-on-Chip (SOC) processors heavily rely on GPIOs. In some cases, every
22 non-dedicated pin can be configured as a GPIO; and most chips have at least
27 Most PC southbridges have a few dozen GPIO-capable pins (with only the BIOS
32 - Output values are writable (high=1, low=0). Some chips also have
33 options about how that value is driven, so that for example only one
34 value might be driven ... supporting "wire-OR" and similar schemes
37 - Input values are likewise readable (1, 0). Some chips support readback
38 of pins configured as "output", which is very useful in such "wire-OR"
40 input de-glitch/debounce logic, sometimes with software controls.
42 - Inputs can often be used as IRQ signals, often edge triggered but
43 sometimes level triggered. Such IRQs may be configurable as system
46 - Usually a GPIO will be configurable as either input or output, as needed
49 - Most GPIOs can be accessed while holding spinlocks, but those accessed
52 On a given board each GPIO is used for one specific purpose like monitoring
60 Note that this is called a "convention" because you don't need to do it this
62 is not the main issue; GPIOs are often used for the kind of board-specific
64 used on a board that's wired differently. Only least-common-denominator
65 functionality can be very portable. Other features are platform-specific,
69 One platform might implement it as simple inline functions accessing chip
71 used for several very different kinds of GPIO controller. (There is some
73 in this document, but drivers acting as clients to the GPIO interface must
76 That said, if the convention is supported on their platform, drivers should
78 is strictly required. Drivers that can't work without
80 GPIO calls are available, either as "real code" or as optimized-away stubs,
86 see what your code is doing, and help maintain it.
93 -----------------
95 reserves "negative" numbers for other purposes like marking signals as
97 touch the underlying hardware treats these integers as opaque cookies.
100 for the GPIO lines so that board-specific setup code directly corresponds
103 board-specific pin configuration data (along with other board specific
106 So for example one platform uses numbers 32-159 for GPIOs; while another
107 uses numbers 0..63 with one set of GPIO controllers, 64-79 with another
108 type of GPIO controller, and on one particular board 80-95 with an FPGA.
110 use numbers 2000-2063 to identify GPIOs in a bank of I2C GPIO expanders.
113 some negative number (perhaps "-EINVAL"); that will never be valid. To
123 Whether a platform supports multiple GPIO controllers is a platform-specific
124 implementation issue, as are whether that support can leave "holes" in the space
129 -----------
130 The first thing a system should do with a GPIO is allocate it, using
134 setting up a platform_device using the GPIO, is mark its direction::
136 /* set as input or output, returning 0 or negative errno */
140 The return value is zero for success, else a negative errno. It should
142 misconfiguration is possible. You should normally issue these calls from
143 a task context. However, for spinlock-safe GPIOs it's OK to use them
144 before tasking is enabled, as part of early board setup.
151 requested already. That compatibility is being removed from the optional
154 Setting the direction can fail if the GPIO number is invalid, or when
158 that board setup code probably needs to multiplex that pin as a GPIO,
162 Spinlock-Safe GPIO access
163 -------------------------
179 issues including open-drain signaling and output latencies.
185 without sleeping (see below) is an error.
187 Platform-specific implementations are encouraged to optimize the two
197 --------------------------
202 To access such GPIOs, a different set of accessors is defined::
212 spinlock-safe accessors without the cansleep() name suffix.
216 the same as the spinlock-safe calls.
221 setup or driver probe/teardown code, so this is an easy constraint.)::
235 ----------------------------
239 * non-null labels may be useful for diagnostics.
243 /* release previously-claimed GPIO */
246 Passing invalid GPIO numbers to gpio_request() will fail, as will requesting
249 a task context. However, for spinlock-safe GPIOs it's OK to request GPIOs
250 before tasking is enabled, as part of early board setup.
252 These calls serve two basic purposes. One is marking the signals which
253 are actually in use as GPIOs, for better diagnostics; systems may have
255 given board. Another is to catch conflicts, identifying errors when
258 needed to manage a signal that's in active use. That is, requesting a
259 GPIO can serve as a kind of lock.
262 power management, such as by powering down unused chip sectors and, more
272 Any programming of pin multiplexing hardware that is needed to route the
275 setup of an output GPIO's value. This allows a glitch-free migration from a
276 pin's special function to GPIO. This is sometimes required when using a GPIO
277 to implement a workaround on signals typically driven by a non-GPIO HW block.
280 Similarly, other aspects of the GPIO or pin may need to be configured, such as
306 where 'flags' is currently defined to specify the following properties:
308 * GPIOF_DIR_IN - to configure direction as input
309 * GPIOF_DIR_OUT - to configure direction as output
311 * GPIOF_INIT_LOW - as output, set initial level to LOW
312 * GPIOF_INIT_HIGH - as output, set initial level to HIGH
314 since GPIOF_INIT_* are only valid when configured as output, so group valid
315 combinations as:
317 * GPIOF_IN - configure as input
318 * GPIOF_OUT_INIT_LOW - configured as output, initial level LOW
319 * GPIOF_OUT_INIT_HIGH - configured as output, initial level HIGH
321 Further more, to ease the claim/release of multiple GPIOs, 'struct gpio' is
322 introduced to encapsulate all three fields as::
352 --------------------
362 some GPIOs can't be used as IRQs.) It is an unchecked error to use a GPIO
363 number that wasn't set up as an input using gpio_direction_input(), or
369 Non-error values returned from gpio_to_irq() can be passed to request_irq()
371 devices, by the board-specific initialization code. Note that IRQ trigger
372 options are part of the IRQ interface, e.g. IRQF_TRIGGER_FALLING, as are
377 ----------------------------
379 low signal level is actually driven. (That term applies to CMOS transistors;
380 "open collector" is used for TTL.) A pullup resistor causes the high signal
381 level. This is sometimes called a "wire-AND"; or more practically, from the
382 negative logic (low=true) perspective this is a "wire-OR".
384 One common example of an open drain signal is a shared active-low IRQ line.
390 be used as either an input or an output:
400 is driving the shared signal low. That's not necessarily an error. As one
407 ------------------------------------------
420 But how does the pin control subsystem cross-correlate the GPIO
424 This is done by registering "ranges" of pins, which are essentially
425 cross-reference tables. These are described in
426 Documentation/driver-api/pin-control.rst
428 While the pin allocation is totally managed by the pinctrl subsystem,
429 gpio (under gpiolib) is still maintained by gpio drivers. It may happen
430 that different pin ranges in a SoC is managed by different gpio drivers.
442 For non-DT support, user can call gpiochip_add_pin_range() with appropriate
444 exact name string of pinctrl device has to be passed as one of the
450 One of the biggest things these conventions omit is pin multiplexing, since
451 this is highly chip-specific and nonportable. One platform might not need
457 Related to multiplexing is configuration and enabling of the pullups or
460 pullups (or pulldowns) so that the on-chip ones should not be used.
461 (When a circuit needs 5 kOhm, on-chip 100 kOhm resistors won't do.)
462 Likewise drive strength (2 mA vs 20 mA) and voltage (1.8V vs 3.3V) is a
463 platform-specific issue, as are models like (not) having a one-to-one
466 There are other system-specific mechanisms that are not specified here,
467 like the aforementioned options for input de-glitching and wire-OR output.
472 from pins not managed as GPIOs. Code relying on such mechanisms will
475 Dynamic definition of GPIOs is not currently standard; for example, as
476 a side effect of configuring an add-on board with some GPIO expanders.
481 As noted earlier, there is an optional implementation framework making it
483 the same programming interface. This framework is called "gpiolib".
485 As a debugging aid, if debugfs is available a /sys/kernel/debug/gpio file
491 -----------------------------
492 In this framework each GPIO controller is packaged as a "struct gpio_chip"
495 - methods to establish GPIO direction
496 - methods used to access GPIO values
497 - flag saying whether calls to its methods may sleep
498 - optional debugfs dump method (showing extra state like pullup config)
499 - label for diagnostics
501 There is also per-instance data, which may come from device.platform_data:
507 rare; use gpiochip_remove() when it is unavoidable.
509 Most often a gpio_chip is part of an instance-specific structure with state
510 not exposed by the GPIO interfaces, such as addressing, power management,
511 and more. Chips such as codecs will have complex non-GPIO state.
514 requested as GPIOs. They can use gpiochip_is_requested(), which returns
519 ----------------
520 To force-enable this framework, a platform's Kconfig will "select" GPIOLIB,
521 else it is up to the user to configure support for GPIO.
524 GPIOs through GPIO-lib and the code cannot be enabled by the user.
532 Fancier implementations could instead define those as inline functions with
533 logic optimizing access to specific SOC-based GPIOs. For example, if the
534 referenced GPIO is the constant "12", getting or setting its value could
535 cost as little as two or three instructions, never sleeping. When such an
536 optimization is not possible those calls must delegate to the framework
540 For SOCs, platform-specific code defines and registers gpio_chip instances
541 for each bank of on-chip GPIOs. Those GPIOs should be numbered/labeled to
543 may well start at zero and go up to a platform-specific limit. Such GPIOs
545 available, from arch_initcall() or earlier; they can often serve as IRQs.
549 -------------
550 For external GPIO controllers -- such as I2C or SPI expanders, ASICs, multi
551 function devices, FPGAs or CPLDs -- most often board-specific code handles
554 platform-specific GPIOs.
562 an I2C-based GPIO, its probe() routine should only be called after that GPIO
564 calls for that GPIO can work. One way to address such dependencies is for
574 configure a sysfs user interface to GPIOs. This is different from the
583 then changing its output state, then updating the code before re-enabling
593 GPIO tasks: "leds-gpio" and "gpio_keys", respectively. Use those
599 --------------
602 - Control interfaces used to get userspace control over GPIOs;
604 - GPIOs themselves; and
606 - GPIO controllers ("gpio_chip" instances).
610 The control interfaces are write-only:
630 "direction" ... reads as either "in" or "out". This value may
631 normally be written. Writing as "out" defaults to
632 initializing the value as low. To ensure glitch free
634 configure the GPIO as an output with that initial value.
641 "value" ... reads as either 0 (low) or 1 (high). If the GPIO
642 is configured as an output, this value may be written;
643 any nonzero value is treated as high.
645 If the pin can be configured as interrupt-generating interrupt
652 new value or close the file and re-open it to read the value.
654 "edge" ... reads as either "none", "rising", "falling", or
658 This file exists only if the pin can be configured as an
661 "active_low" ... reads as either 0 (false) or 1 (true). Write
670 read-only attributes:
674 "base" ... same as N, the first GPIO managed by this chip
678 "ngpio" ... how many GPIOs this manges (N to N + ngpio - 1)
694 .. kernel-doc:: drivers/gpio/gpiolib-legacy.c