Lines Matching +full:gcc +full:- +full:sm8350
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Wesley Cheng <quic_wcheng@quicinc.com>
15 - enum:
16 - qcom,ipq4019-dwc3
17 - qcom,ipq5332-dwc3
18 - qcom,ipq6018-dwc3
19 - qcom,ipq8064-dwc3
20 - qcom,ipq8074-dwc3
21 - qcom,ipq9574-dwc3
22 - qcom,msm8953-dwc3
23 - qcom,msm8994-dwc3
24 - qcom,msm8996-dwc3
25 - qcom,msm8998-dwc3
26 - qcom,qcm2290-dwc3
27 - qcom,qcs404-dwc3
28 - qcom,sa8775p-dwc3
29 - qcom,sc7180-dwc3
30 - qcom,sc7280-dwc3
31 - qcom,sc8280xp-dwc3
32 - qcom,sdm660-dwc3
33 - qcom,sdm670-dwc3
34 - qcom,sdm845-dwc3
35 - qcom,sdx55-dwc3
36 - qcom,sdx65-dwc3
37 - qcom,sm4250-dwc3
38 - qcom,sm6115-dwc3
39 - qcom,sm6125-dwc3
40 - qcom,sm6350-dwc3
41 - qcom,sm6375-dwc3
42 - qcom,sm8150-dwc3
43 - qcom,sm8250-dwc3
44 - qcom,sm8350-dwc3
45 - qcom,sm8450-dwc3
46 - qcom,sm8550-dwc3
47 - const: qcom,dwc3
53 "#address-cells":
56 "#size-cells":
61 power-domains:
65 required-opps:
71 - cfg_noc:: System Config NOC clock.
72 - core:: Master/Core clock, has to be >= 125 MHz for SS operation and >=
74 - iface:: System bus AXI clock.
75 - sleep:: Sleep clock, used for wakeup when USB3 core goes into low
77 - mock_utmi:: Mock utmi clock needed for ITP/SOF generation in host
82 clock-names:
92 interconnect-names:
94 - const: usb-ddr
95 - const: apps-usb
101 interrupt-names:
105 qcom,select-utmi-as-pipe-clk:
112 wakeup-source: true
117 "^usb@[0-9a-f]+$":
122 wakeup-source: false
125 - compatible
126 - reg
127 - "#address-cells"
128 - "#size-cells"
129 - ranges
130 - clocks
131 - clock-names
132 - interrupts
133 - interrupt-names
136 - if:
141 - qcom,ipq4019-dwc3
146 clock-names:
148 - const: core
149 - const: sleep
150 - const: mock_utmi
152 - if:
157 - qcom,ipq8064-dwc3
162 - description: Master/Core clock, has to be >= 125 MHz
164 clock-names:
166 - const: core
168 - if:
173 - qcom,ipq9574-dwc3
174 - qcom,msm8953-dwc3
175 - qcom,msm8996-dwc3
176 - qcom,msm8998-dwc3
177 - qcom,sa8775p-dwc3
178 - qcom,sc7180-dwc3
179 - qcom,sc7280-dwc3
180 - qcom,sdm670-dwc3
181 - qcom,sdm845-dwc3
182 - qcom,sdx55-dwc3
183 - qcom,sm6350-dwc3
188 clock-names:
190 - const: cfg_noc
191 - const: core
192 - const: iface
193 - const: sleep
194 - const: mock_utmi
196 - if:
201 - qcom,ipq6018-dwc3
207 clock-names:
209 - items:
210 - const: core
211 - const: sleep
212 - const: mock_utmi
213 - items:
214 - const: cfg_noc
215 - const: core
216 - const: sleep
217 - const: mock_utmi
219 - if:
224 - qcom,ipq8074-dwc3
229 clock-names:
231 - const: cfg_noc
232 - const: core
233 - const: sleep
234 - const: mock_utmi
236 - if:
241 - qcom,ipq5332-dwc3
242 - qcom,msm8994-dwc3
243 - qcom,qcs404-dwc3
248 clock-names:
250 - const: core
251 - const: iface
252 - const: sleep
253 - const: mock_utmi
255 - if:
260 - qcom,sc8280xp-dwc3
265 clock-names:
267 - const: cfg_noc
268 - const: core
269 - const: iface
270 - const: sleep
271 - const: mock_utmi
272 - const: noc_aggr
273 - const: noc_aggr_north
274 - const: noc_aggr_south
275 - const: noc_sys
277 - if:
282 - qcom,sdm660-dwc3
288 clock-names:
290 - items:
291 - const: cfg_noc
292 - const: core
293 - const: iface
294 - const: sleep
295 - const: mock_utmi
296 - const: bus
297 - items:
298 - const: cfg_noc
299 - const: core
300 - const: sleep
301 - const: mock_utmi
302 - const: bus
304 - if:
309 - qcom,qcm2290-dwc3
310 - qcom,sm6115-dwc3
311 - qcom,sm6125-dwc3
312 - qcom,sm8150-dwc3
313 - qcom,sm8250-dwc3
314 - qcom,sm8450-dwc3
315 - qcom,sm8550-dwc3
320 clock-names:
322 - const: cfg_noc
323 - const: core
324 - const: iface
325 - const: sleep
326 - const: mock_utmi
327 - const: xo
329 - if:
334 - qcom,sm8350-dwc3
340 clock-names:
343 - const: cfg_noc
344 - const: core
345 - const: iface
346 - const: sleep
347 - const: mock_utmi
348 - const: xo
350 - if:
355 - qcom,ipq4019-dwc3
356 - qcom,ipq6018-dwc3
357 - qcom,ipq8064-dwc3
358 - qcom,ipq8074-dwc3
359 - qcom,msm8994-dwc3
360 - qcom,qcs404-dwc3
361 - qcom,sc7180-dwc3
362 - qcom,sdm670-dwc3
363 - qcom,sdm845-dwc3
364 - qcom,sdx55-dwc3
365 - qcom,sdx65-dwc3
366 - qcom,sm4250-dwc3
367 - qcom,sm6125-dwc3
368 - qcom,sm6350-dwc3
369 - qcom,sm8150-dwc3
370 - qcom,sm8250-dwc3
371 - qcom,sm8350-dwc3
372 - qcom,sm8450-dwc3
373 - qcom,sm8550-dwc3
378 - description: The interrupt that is asserted
380 - description: The interrupt that is asserted
382 - description: Wakeup event on DM line.
383 - description: Wakeup event on DP line.
384 interrupt-names:
386 - const: hs_phy_irq
387 - const: ss_phy_irq
388 - const: dm_hs_phy_irq
389 - const: dp_hs_phy_irq
391 - if:
396 - qcom,msm8953-dwc3
397 - qcom,msm8996-dwc3
398 - qcom,msm8998-dwc3
399 - qcom,sm6115-dwc3
404 interrupt-names:
406 - const: hs_phy_irq
407 - const: ss_phy_irq
409 - if:
414 - qcom,ipq5332-dwc3
415 - qcom,sdm660-dwc3
421 interrupt-names:
424 - const: hs_phy_irq
425 - const: ss_phy_irq
427 - if:
432 - qcom,sc7280-dwc3
438 interrupt-names:
441 - const: hs_phy_irq
442 - const: dp_hs_phy_irq
443 - const: dm_hs_phy_irq
444 - const: ss_phy_irq
446 - if:
451 - qcom,sc8280xp-dwc3
456 interrupt-names:
458 - const: pwr_event
459 - const: dp_hs_phy_irq
460 - const: dm_hs_phy_irq
461 - const: ss_phy_irq
463 - if:
468 - qcom,sa8775p-dwc3
474 interrupt-names:
477 - const: pwr_event
478 - const: dp_hs_phy_irq
479 - const: dm_hs_phy_irq
480 - const: ss_phy_irq
485 - |
486 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
487 #include <dt-bindings/interrupt-controller/arm-gic.h>
488 #include <dt-bindings/interrupt-controller/irq.h>
490 #address-cells = <2>;
491 #size-cells = <2>;
494 compatible = "qcom,sdm845-dwc3", "qcom,dwc3";
497 #address-cells = <2>;
498 #size-cells = <2>;
500 clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>,
501 <&gcc GCC_USB30_PRIM_MASTER_CLK>,
502 <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>,
503 <&gcc GCC_USB30_PRIM_SLEEP_CLK>,
504 <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>;
505 clock-names = "cfg_noc",
511 assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
512 <&gcc GCC_USB30_PRIM_MASTER_CLK>;
513 assigned-clock-rates = <19200000>, <150000000>;
519 interrupt-names = "hs_phy_irq", "ss_phy_irq",
522 power-domains = <&gcc USB30_PRIM_GDSC>;
524 resets = <&gcc GCC_USB30_PRIM_BCR>;
534 phy-names = "usb2-phy", "usb3-phy";