Lines Matching refs:timer
4 $id: http://devicetree.org/schemas/timer/arm,arch_timer_mmio.yaml#
7 title: ARM memory mapped architected timer
14 ARM cores may have a memory mapped architected timer, which provides up to 8
15 frames with a physical and optional virtual timer per frame.
17 The memory mapped timer is attached to a GIC to deliver its interrupts via SPIs.
23 - arm,armv7-timer-mem
45 description: If present, the timer is powered through an always-on power
50 description: Firmware does not initialize any of the generic timer CPU
66 description: A timer node has up to 8 frame sub-nodes, each with the following properties.
76 - description: physical timer irq
77 - description: virtual timer irq
100 timer@f0000000 {
101 compatible = "arm,armv7-timer-mem";