bindings/spi/xlnx%2Czynq-qspi.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/xlnx,zynq-qspi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Xilinx Zynq QSPI controller
10   The Xilinx Zynq QSPI controller is used to access multi-bit serial flash
14   - $ref: spi-controller.yaml#
17   - Michal Simek <michal.simek@amd.com>
22     const: xlnx,zynq-qspi-1.0
25     maxItems: 1
28     maxItems: 1
32       - description: reference clock
33       - description: peripheral clock
35   clock-names:
37       - const: ref_clk
38       - const: pclk
41   - compatible
42   - reg
43   - interrupts
44   - clocks
45   - clock-names
50   - |
52         compatible = "xlnx,zynq-qspi-1.0";
54         interrupt-parent = <&intc>;
56         clock-names = "ref_clk", "pclk";
58         num-cs = <1>;