bindings/spi/spi-sifive.yaml

4 $id: http://devicetree.org/schemas/spi/spi-sifive.yaml#
7 title: SiFive SPI controller
10   - Pragnesh Patel <pragnesh.patel@sifive.com>
11   - Paul Walmsley  <paul.walmsley@sifive.com>
12   - Palmer Dabbelt <palmer@sifive.com>
21           - sifive,fu540-c000-spi
22           - sifive,fu740-c000-spi
23       - const: sifive,spi0
26       Should be "sifive,<chip>-spi" and "sifive,spi<version>".
28       "sifive,fu540-c000-spi" and "sifive,fu740-c000-spi" for the SiFive SPI v0
29       as integrated onto the SiFive FU540 and FU740 chip resp, and "sifive,spi0"
30       for the SiFive SPI v0 IP block with no chip integration tweaks.
31       Please refer to sifive-blocks-ip-versioning.txt for details
34       https://github.com/sifive/sifive-blocks/tree/master/src/main/scala/devices/spi
51   sifive,fifo-depth:
58   sifive,max-bits-per-word:
76       compatible = "sifive,fu540-c000-spi", "sifive,spi0";
83       sifive,fifo-depth = <8>;
84       sifive,max-bits-per-word = <8>;