bindings/spi/renesas%2Crzv2m-csi.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/renesas,rzv2m-csi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas RZ/V2M Clocked Serial Interface (CSI)
10   - Fabrizio Castro <fabrizio.castro.jz@renesas.com>
11   - Geert Uytterhoeven <geert+renesas@glider.be>
14   - $ref: spi-controller.yaml#
18     const: renesas,rzv2m-csi
28       - description: The clock used to generate the output clock (CSICLK)
29       - description: Internal clock to access the registers (PCLK)
31   clock-names:
33       - const: csiclk
34       - const: pclk
39   power-domains:
43   - compatible
44   - reg
45   - interrupts
46   - clocks
47   - clock-names
48   - resets
49   - power-domains
50   - '#address-cells'
51   - '#size-cells'
56   - |
57     #include <dt-bindings/interrupt-controller/arm-gic.h>
58     #include <dt-bindings/clock/r9a09g011-cpg.h>
60         compatible = "renesas,rzv2m-csi";
65         clock-names = "csiclk", "pclk";
67         power-domains = <&cpg>;
68         #address-cells = <1>;
69         #size-cells = <0>;