Lines Matching +full:is +full:- +full:wired
3 The SSI is a serial device that communicates with audio codecs. It can
4 be programmed in AC97, I2S, left-justified, or right-justified modes.
7 - compatible: Compatible list, should contain one of the following
9 fsl,mpc8610-ssi
10 fsl,imx51-ssi
11 fsl,imx35-ssi
12 fsl,imx21-ssi
13 - cell-index: The SSI, <0> = SSI1, <1> = SSI2, and so on.
14 - reg: Offset and length of the register set for the device.
15 - interrupts: <a b> where a is the interrupt number and b is a
21 - fsl,fifo-depth: The number of elements in the transmit and receive FIFOs.
22 This number is the maximum allowed value for SFCSR[TFWM0].
23 - clocks: "ipg" - Required clock for the SSI unit
24 "baud" - Required clock for SSI master mode. Otherwise this
25 clock is not used
27 Required are also ac97 link bindings if ac97 is used. See
28 Documentation/devicetree/bindings/sound/soc-ac97link.txt for the necessary
32 - codec-handle: Phandle to a 'codec' node that defines an audio
33 codec connected to this SSI. This node is typically
35 - fsl,fiq-stream-filter: Bool property. Disabled DMA and use FIQ instead to
36 filter the codec stream. This is necessary for some boards
37 where an incompatible codec is connected to this SSI, e.g.
39 - dmas: Generic dma devicetree binding as described in
41 - dma-names: Two dmas have to be defined, "tx" and "rx", if fsl,imx-fiq
42 is not defined.
43 - fsl,mode: The operating mode for the AC97 interface only.
44 "ac97-slave" - AC97 mode, SSI is clock slave
45 "ac97-master" - AC97 mode, SSI is clock master
46 - fsl,ssi-asynchronous:
47 If specified, the SSI is to be programmed in asynchronous
56 - fsl,playback-dma: Phandle to a node for the DMA channel to use for
57 playback of audio. This is typically dictated by SOC
60 - fsl,capture-dma: Phandle to a node for the DMA channel to use for
61 capture (recording) of audio. This is typically dictated
66 - compatible: Compatible list, contains the name of the codec
69 - clock-frequency: The frequency of the input clock, which typically comes
70 from an on-board dedicated oscillator.
72 Notes on fsl,playback-dma and fsl,capture-dma:
74 On SOCs that have an SSI, specific DMA channels are hard-wired for playback
78 DMA controller to use, but the channels themselves are hard-wired. The
79 purpose of these two properties is to represent this hardware design.
82 "fsl,playback-dma" and "fsl,capture-dma" must be marked as compatible with
83 "fsl,ssi-dma-channel". The SOC-specific compatible string (e.g.
84 "fsl,mpc8610-dma-channel") can remain. If these nodes are left as
85 "fsl,elo-dma-channel" or "fsl,eloplus-dma-channel", then the generic Elo DMA