bindings/sound/everest%2Ces8326.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - David Yang <yangxiaohua@everest-semi.com>
21       - description: clock for master clock (MCLK)
23   clock-names:
25       - const: mclk
27   "#sound-dai-cells":
30   everest,jack-pol:
33       just the value of reg 57. Bit(3) decides whether the jack polarity is inverted.
40   everest,mic1-src:
48   everest,mic2-src:
56   everest,jack-detect-inverted:
59       Defined to invert the jack detection.
61   everest,interrupt-src:
66       Bit(3) 1 means PIN9 is the irq source for jack detection. When set to 0,
68       Bit(4) 1 means PIN27 is the irq source for jack detection.
75   everest,interrupt-clk:
79      Bit(0-3) 0 means irq pulse equals 512*internal clock
86      Bit(6) 1 means the chip do not detect jack type after button released.
87        0 means the chip detect jack type again after button released.
93   - compatible
94   - reg
95   - "#sound-dai-cells"
100   - |
102       #address-cells = <1>;
103       #size-cells = <0>;
108         clock-names = "mclk";
109         #sound-dai-cells = <0>;
110         everest,mic1-src = [22];
111         everest,mic2-src = [44];
112         everest,jack-pol = [0e];
113         everest,interrupt-src = [08];
114         everest,interrupt-clk = [45];