Lines Matching +full:mdio +full:- +full:mux +full:- +full:2
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 TI Programmable Real-Time Unit and Industrial Communication Subsystem
11 - Suman Anna <s-anna@ti.com>
15 The Programmable Real-Time Unit and Industrial Communication Subsystem
16 (PRU-ICSS a.k.a. PRUSS) is present on various TI SoCs such as AM335x, AM437x,
17 Keystone 66AK2G, OMAP-L138/DA850 etc. A PRUSS consists of dual 32-bit RISC
18 cores (Programmable Real-Time Units, or PRUs), shared RAM, data and
23 peripheral interfaces, fast real-time responses, or specialized data handling.
25 - an Ethernet MII_RT module with two MII ports
26 - an MDIO port to control external Ethernet PHYs
27 - an Industrial Ethernet Peripheral (IEP) to manage/generate Industrial
29 - an Enhanced Capture Module (eCAP)
30 - an Industrial Ethernet Timer with 7/9 capture and 16 compare events
31 - a 16550-compatible UART to support PROFIBUS
32 - Enhanced GPIO with async capture and serial support
34 A PRU-ICSS subsystem can have up to three shared data memories. A PRU core
35 acts on a primary Data RAM (there are usually 2 Data RAMs) at its address
42 Various sub-modules within a PRU-ICSS subsystem are represented as individual
43 nodes and are defined using a parent-child hierarchy depending on their
48 PRU-ICSS Node
50 Each PRU-ICSS instance is represented as its own node with the individual PRU
51 processor cores, the memories node, an INTC node and an MDIO node represented
53 corresponding interconnect bus nodes or target-module nodes.
60 pattern: "^(pruss|icssg)@[0-9a-f]+$"
64 - ti,am3356-pruss # for AM335x SoC family
65 - ti,am4376-pruss0 # for AM437x SoC family and PRUSS unit 0
66 - ti,am4376-pruss1 # for AM437x SoC family and PRUSS unit 1
67 - ti,am5728-pruss # for AM57xx SoC family
68 - ti,am625-pruss # for K3 AM62x SoC family
69 - ti,am642-icssg # for K3 AM64x SoC family
70 - ti,am654-icssg # for K3 AM65x SoC family
71 - ti,j721e-icssg # for K3 J721E SoC family
72 - ti,k2g-pruss # for 66AK2G SoC family
77 "#address-cells":
80 "#size-cells":
86 dma-ranges:
89 dma-coherent: true
91 power-domains:
93 This property is as per sci-pm-domain.txt.
97 memories@[a-f0-9]+$:
99 The various Data RAMs within a single PRU-ICSS unit are represented as a
106 minItems: 2 # On AM437x one of two PRUSS units don't contain Shared RAM.
108 - description: Address and size of the Data RAM0.
109 - description: Address and size of the Data RAM1.
110 - description: |
115 reg-names:
116 minItems: 2
118 - const: dram0
119 - const: dram1
120 - const: shrdram2
123 - reg
124 - reg-names
128 cfg@[a-f0-9]+$:
130 PRU-ICSS configuration space. CFG sub-module represented as a SysCon.
138 - const: ti,pruss-cfg
139 - const: syscon
141 "#address-cells":
144 "#size-cells":
157 "#address-cells":
160 "#size-cells":
164 coreclk-mux@[a-f0-9]+$:
167 core clock can be set to one of the 2 sources: ICSSG_CORE_CLK or
168 ICSSG_ICLK. This node models this clock mux and should have the
169 name "coreclk-mux".
174 '#clock-cells':
179 - description: ICSSG_CORE Clock
180 - description: ICSSG_ICLK Clock
182 assigned-clocks:
185 assigned-clock-parents:
188 Standard assigned-clocks-parents definition used for selecting
189 mux parent (one of the mux input).
195 - clocks
199 iepclk-mux@[a-f0-9]+$:
201 The IEP module can get its clock from 2 sources: ICSSG_IEP_CLK or
203 mux and should have the name "iepclk-mux".
208 '#clock-cells':
213 - description: ICSSG_IEP Clock
214 - description: Core Clock (OCP Clock in older SoCs)
216 assigned-clocks:
219 assigned-clock-parents:
222 Standard assigned-clocks-parents definition used for selecting
223 mux parent (one of the mux input).
229 - clocks
235 iep@[a-f0-9]+$:
239 AM437x, AM57xx & 66AK2G SoCs) or 2 IEPs (on K3 AM65x, J721E & AM64x SoCs).
244 mii-rt@[a-f0-9]+$:
246 Real-Time Ethernet to support multiple industrial communication protocols.
247 MII-RT sub-module represented as a SysCon.
254 - const: ti,pruss-mii
255 - const: syscon
262 mii-g-rt@[a-f0-9]+$:
264 The Real-time Media Independent Interface to support multiple industrial
265 communication protocols (G stands for Gigabit). MII-G-RT sub-module
273 - const: ti,pruss-mii-g
274 - const: syscon
281 interrupt-controller@[a-f0-9]+$:
285 interrupt-controller node.
286 $ref: /schemas/interrupt-controller/ti,pruss-intc.yaml#
289 mdio@[a-f0-9]+$:
291 MDIO Node. Each PRUSS has an MDIO module that can be used to control
292 external PHYs. The MDIO module used within the PRU-ICSS is an instance of
293 the MDIO Controller used in TI Davinci SoCs.
294 $ref: /schemas/net/ti,davinci-mdio.yaml#
297 "^(pru|rtu|txpru)@[0-9a-f]+$":
304 $ref: /schemas/remoteproc/ti,pru-rproc.yaml#
308 - compatible
309 - reg
310 - ranges
314 # Due to inability of correctly verifying sub-nodes with an @address through
315 # the "required" list, the required sub-nodes below are commented out for now.
318 # - memories
319 # - interrupt-controller
320 # - pru
323 - if:
328 - ti,k2g-pruss
329 - ti,am654-icssg
330 - ti,j721e-icssg
331 - ti,am642-icssg
334 - power-domains
336 - if:
341 - ti,k2g-pruss
344 - dma-coherent
347 - |
349 /* Example 1 AM33xx PRU-ICSS */
351 compatible = "ti,am3356-pruss";
353 #address-cells = <1>;
354 #size-cells = <1>;
361 reg-names = "dram0", "dram1", "shrdram2";
365 compatible = "ti,pruss-cfg", "syscon";
366 #address-cells = <1>;
367 #size-cells = <1>;
372 #address-cells = <1>;
373 #size-cells = <0>;
375 pruss_iepclk_mux: iepclk-mux@30 {
377 #clock-cells = <0>;
384 pruss_mii_rt: mii-rt@32000 {
385 compatible = "ti,pruss-mii", "syscon";
389 pruss_intc: interrupt-controller@20000 {
390 compatible = "ti,pruss-intc";
392 interrupt-controller;
393 #interrupt-cells = <3>;
395 interrupt-names = "host_intr0", "host_intr1",
402 compatible = "ti,am3356-pru";
406 reg-names = "iram", "control", "debug";
407 firmware-name = "am335x-pru0-fw";
411 compatible = "ti,am3356-pru";
415 reg-names = "iram", "control", "debug";
416 firmware-name = "am335x-pru1-fw";
419 pruss_mdio: mdio@32400 {
423 clock-names = "fck";
425 #address-cells = <1>;
426 #size-cells = <0>;
430 - |
432 /* Example 2 AM43xx PRU-ICSS with PRUSS1 node */
433 #include <dt-bindings/interrupt-controller/arm-gic.h>
435 compatible = "ti,am4376-pruss1";
437 #address-cells = <1>;
438 #size-cells = <1>;
445 reg-names = "dram0", "dram1", "shrdram2";
449 compatible = "ti,pruss-cfg", "syscon";
450 #address-cells = <1>;
451 #size-cells = <1>;
456 #address-cells = <1>;
457 #size-cells = <0>;
459 pruss1_iepclk_mux: iepclk-mux@30 {
461 #clock-cells = <0>;
468 pruss1_mii_rt: mii-rt@32000 {
469 compatible = "ti,pruss-mii", "syscon";
473 pruss1_intc: interrupt-controller@20000 {
474 compatible = "ti,pruss-intc";
476 interrupt-controller;
477 #interrupt-cells = <3>;
485 interrupt-names = "host_intr0", "host_intr1",
489 ti,irqs-reserved = /bits/ 8 <0x20>; /* BIT(5) */
493 compatible = "ti,am4376-pru";
497 reg-names = "iram", "control", "debug";
498 firmware-name = "am437x-pru1_0-fw";
502 compatible = "ti,am4376-pru";
506 reg-names = "iram", "control", "debug";
507 firmware-name = "am437x-pru1_1-fw";
510 pruss1_mdio: mdio@32400 {
514 clock-names = "fck";
516 #address-cells = <1>;
517 #size-cells = <0>;