soc/qcom/qcom%2Cgeni-se.yaml

1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/qcom/qcom,geni-se.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: GENI Serial Engine QUP Wrapper Controller
10   - Bjorn Andersson <bjorn.andersson@linaro.org>
13  Generic Interface (GENI) based Qualcomm Universal Peripheral (QUP) wrapper
15  like UART, SPI, I2C, I3C, etc. A single QUP module can provide upto 8 Serial
16  Interfaces, using its internal Serial Engines. The GENI Serial Engine QUP
23       - qcom,geni-se-qup
24       - qcom,geni-se-i2c-master-hub
30   clock-names:
38   "#address-cells":
41   "#size-cells":
49   interconnect-names:
50     const: qup-core
56   - compatible
57   - reg
58   - clock-names
59   - clocks
60   - "#address-cells"
61   - "#size-cells"
62   - ranges
65   "spi@[0-9a-f]+$":
67     description: GENI serial engine based SPI controller. SPI in master mode
71     $ref: /schemas/spi/qcom,spi-geni-qcom.yaml#
73   "i2c@[0-9a-f]+$":
75     description: GENI serial engine based I2C controller.
76     $ref: /schemas/i2c/qcom,i2c-geni-qcom.yaml#
78   "serial@[0-9a-f]+$":
80     description: GENI Serial Engine based UART Controller.
81     $ref: /schemas/serial/qcom,serial-geni-qcom.yaml#
84   - if:
88             const: qcom,geni-se-i2c-master-hub
91         clock-names:
93             - const: s-ahb
97             - description: Slave AHB Clock
102         "spi@[0-9a-f]+$": false
103         "serial@[0-9a-f]+$": false
106         clock-names:
108             - const: m-ahb
109             - const: s-ahb
113             - description: Master AHB Clock
114             - description: Slave AHB Clock
119   - |
120     #include <dt-bindings/clock/qcom,gcc-sdm845.h>
121     #include <dt-bindings/interrupt-controller/arm-gic.h>
124         #address-cells = <2>;
125         #size-cells = <2>;
128             compatible = "qcom,geni-se-qup";
130             clock-names = "m-ahb", "s-ahb";
133             #address-cells = <2>;
134             #size-cells = <2>;
138                 compatible = "qcom,geni-i2c";
141                 clock-names = "se";
143                 pinctrl-names = "default", "sleep";
144                 pinctrl-0 = <&qup_1_i2c_5_active>;
145                 pinctrl-1 = <&qup_1_i2c_5_sleep>;
146                 #address-cells = <1>;
147                 #size-cells = <0>;
151                 compatible = "qcom,geni-uart";
154                 clock-names = "se";
156                 pinctrl-names = "default", "sleep";
157                 pinctrl-0 = <&qup_1_uart_3_active>;
158                 pinctrl-1 = <&qup_1_uart_3_sleep>;