Lines Matching +full:imx25 +full:- +full:uart

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/serial/fsl-imx-uart.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale i.MX Universal Asynchronous Receiver/Transmitter (UART)
10 - Fabio Estevam <festevam@gmail.com>
13 - $ref: serial.yaml#
14 - $ref: rs485.yaml#
19 - const: fsl,imx1-uart
20 - const: fsl,imx21-uart
21 - items:
22 - enum:
23 - fsl,imx25-uart
24 - fsl,imx27-uart
25 - fsl,imx31-uart
26 - fsl,imx35-uart
27 - fsl,imx50-uart
28 - fsl,imx51-uart
29 - fsl,imx53-uart
30 - fsl,imx6q-uart
31 - const: fsl,imx21-uart
32 - items:
33 - enum:
34 - fsl,imx6sl-uart
35 - fsl,imx6sll-uart
36 - fsl,imx6sx-uart
37 - const: fsl,imx6q-uart
38 - const: fsl,imx21-uart
39 - items:
40 - enum:
41 - fsl,imx6ul-uart
42 - fsl,imx7d-uart
43 - fsl,imx8mm-uart
44 - fsl,imx8mn-uart
45 - fsl,imx8mp-uart
46 - fsl,imx8mq-uart
47 - const: fsl,imx6q-uart
55 clock-names:
57 - const: ipg
58 - const: per
62 - description: DMA controller phandle and request line for RX
63 - description: DMA controller phandle and request line for TX
65 dma-names:
67 - const: rx
68 - const: tx
73 fsl,dte-mode:
76 Indicate the uart works in DTE mode. The uart works in DCE mode by default.
78 fsl,inverted-tx:
85 fsl,inverted-rx:
92 fsl,dma-info:
93 $ref: /schemas/types.yaml#/definitions/uint32-array
105 - compatible
106 - reg
107 - clocks
108 - clock-names
109 - interrupts
114 - |
115 #include <dt-bindings/clock/imx5-clock.h>
122 compatible = "fsl,imx51-uart", "fsl,imx21-uart";
127 clock-names = "ipg", "per";
129 dma-names = "rx", "tx";
130 uart-has-rtscts;
131 fsl,dte-mode;