Lines Matching +full:pwm +full:- +full:0
1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/pwm/renesas,pwm-rcar.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car PWM Timer Controller
10 - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
15 - enum:
16 - renesas,pwm-r8a7742 # RZ/G1H
17 - renesas,pwm-r8a7743 # RZ/G1M
18 - renesas,pwm-r8a7744 # RZ/G1N
19 - renesas,pwm-r8a7745 # RZ/G1E
20 - renesas,pwm-r8a77470 # RZ/G1C
21 - renesas,pwm-r8a774a1 # RZ/G2M
22 - renesas,pwm-r8a774b1 # RZ/G2N
23 - renesas,pwm-r8a774c0 # RZ/G2E
24 - renesas,pwm-r8a774e1 # RZ/G2H
25 - renesas,pwm-r8a7778 # R-Car M1A
26 - renesas,pwm-r8a7779 # R-Car H1
27 - renesas,pwm-r8a7790 # R-Car H2
28 - renesas,pwm-r8a7791 # R-Car M2-W
29 - renesas,pwm-r8a7794 # R-Car E2
30 - renesas,pwm-r8a7795 # R-Car H3
31 - renesas,pwm-r8a7796 # R-Car M3-W
32 - renesas,pwm-r8a77961 # R-Car M3-W+
33 - renesas,pwm-r8a77965 # R-Car M3-N
34 - renesas,pwm-r8a77970 # R-Car V3M
35 - renesas,pwm-r8a77980 # R-Car V3H
36 - renesas,pwm-r8a77990 # R-Car E3
37 - renesas,pwm-r8a77995 # R-Car D3
38 - renesas,pwm-r8a779a0 # R-Car V3U
39 - renesas,pwm-r8a779g0 # R-Car V4H
40 - const: renesas,pwm-rcar
43 # base address and length of the registers block for the PWM.
46 '#pwm-cells':
47 # should be 2. See pwm.yaml in this directory for a description of
55 power-domains:
62 - compatible
63 - reg
64 - clocks
65 - power-domains
68 - $ref: pwm.yaml#
70 - if:
76 - renesas,pwm-r8a7778
77 - renesas,pwm-r8a7779
80 - resets
85 - |
86 #include <dt-bindings/clock/r8a7743-cpg-mssr.h>
87 #include <dt-bindings/power/r8a7743-sysc.h>
89 pwm0: pwm@e6e30000 {
90 compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar";
91 reg = <0xe6e30000 0x8>;
93 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
95 #pwm-cells = <2>;
96 pinctrl-0 = <&pwm0_pins>;
97 pinctrl-names = "default";