bindings/pinctrl/samsung%2Cpinctrl-pins-cfg.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/samsung,pinctrl-pins-cfg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung S3C/S5P/Exynos SoC pin controller - pins configuration
10   - Krzysztof Kozlowski <krzk@kernel.org>
11   - Sylwester Nawrocki <s.nawrocki@samsung.com>
12   - Tomasz Figa <tomasz.figa@gmail.com>
15   This is a part of device tree bindings for Samsung S3C/S5P/Exynos SoC pin
18   Pins configuration for Samsung S3C/S5P/Exynos SoC pin controller.
21   manual and these values are programmed as-is into the pin pull up/down and
22   driver strength register of the pin-controller.
28   samsung,pins:
30       List of pins to configure. For initial and sleep states, the maximum
33       The pins should use lowercase names matching hardware manual, e.g. for
34       GPA0 bank: gpa0-0, gpa0-1, gpa0-2.
35     $ref: /schemas/types.yaml#/definitions/string-array
37   samsung,pin-function:
39       The pin function selection that should be applied on the pins listed in the
40       child node is specified using the "samsung,pin-function" property. The value
41       of this property that should be applied to each of the pins listed in the
42       "samsung,pins" property should be picked from the hardware manual of the SoC
44       no specific function selection is desired for the pins listed in the child
45       node. The value of this property is used as-is to program the pin-controller
46       function selector register of the pin-bank.
51   samsung,pin-drv:
57   samsung,pin-pud:
60     enum: [0, 1, 2, 3]
62   samsung,pin-val:
65     enum: [0, 1]
67   samsung,pin-con-pdn:
70     enum: [0, 1, 2, 3]
72   samsung,pin-pud-pdn:
75     enum: [0, 1, 2, 3]
78   - samsung,pins